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CS4970X4 Datasheet(PDF) 25 Page - Cirrus Logic

Part No. CS4970X4
Description  32-bit High Definition Audio Decoder DSP Family
Download  36 Pages
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Maker  CIRRUS [Cirrus Logic]
Homepage  http://www.cirrus.com
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CS4970X4 Datasheet(HTML) 25 Page - Cirrus Logic

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DS752PP7
Copyright 2008 Cirrus Logic
25
CS4970x4 Data Sheet
32-bit High Definition Audio Decoder DSP Family
Figure 15. Digital Audio Output Timing, Slave Mode (Relationship LRCLK to SCLK)
5.19 Switching Characteristics — SDRAM Interface
Refer to Figure 16 through Figure 19.
(SD_CLKOUT = SD_CLKIN)
DAO_SCLK
DAO_LRCLK
DAOn_DATAn
tdaosstlr
tdaosclk
DAO_SCLK
DAO_LRCLK
tdaoslrts
tdaosdv
tdaosclk
Note: In these diagrams, Falling edge is the inactive edge of DAO_SCLK
Parameter
Symbol
Min
Typical
Max
Unit
SD_CLKIN high time
tsdclkh
2.3
-
ns
SD_CLKIN low time
tsdclkl
2.3
-
ns
SD_CLKOUT rise/fall time
tsdclkrf
-1
ns
SD_CLKOUT Frequency
150
MHz
SD_CLKOUT duty cycle
-
45
55
%
SD_CLKOUT rising edge to signal valid
tsdcmdv
-3.8
ns
Signal hold from SD_CLKOUT rising edge
tsdcmdh
1.1
-
ns
SD_CLKOUT rising edge to SD_DQMn valid
tsddqv
-3.8
-
ns
SD_DQMn hold from SD_CLKOUT rising edge
tsddqh
1.38
-
ns
SD_DATA valid setup to SD_CLKIN rising edge
tsddsu
1.3
-
ns
SD_DATA valid hold to SD_CLKIN rising edge
tsddh
1.38
-
ns
SD_CLKOUT rising edge to ADDRn valid
tsdav
-3.8
-
ns


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