Electronic Components Datasheet Search
  English  ▼

Delete All
ON OFF
ALLDATASHEET.COM

X  

Preview PDF HTML

CS4970X4 Datasheet(PDF) 21 Page - Cirrus Logic

Part No. CS4970X4
Description  32-bit High Definition Audio Decoder DSP Family
Download  36 Pages
Scroll/Zoom Zoom In 100% Zoom Out
Maker  CIRRUS [Cirrus Logic]
Homepage  http://www.cirrus.com
Logo 

CS4970X4 Datasheet(HTML) 21 Page - Cirrus Logic

Zoom Inzoom in Zoom Outzoom out
 21 / 36 page
background image
DS752PP7
Copyright 2008 Cirrus Logic
21
CS4970x4 Data Sheet
32-bit High Definition Audio Decoder DSP Family
5.15 Switching Characteristics — UART
Figure 11. UART Timing
Parameter
Symbol
Min
Max
Unit
UART_CLK period1
1. The minimum clock period is limited to DCLKP/32 or the minimum value, whichever is larger.
tuclki
266
-
ns
UART_CLK duty cycle
-
40
60
%
Setup time for UART_RXD
tuckrxsu
5-
Hold time for UART_RXD
tuckrxdv
5-
ns
Delay from CLK transition to TXD transition
tucktxdv
-29
ns
ttxen
TBD
TBD
ns
ttxhz
TBD
TBD
ns
UART_CLK
UART_RXD
UART_TXD
t
uckrxsu
t
ucktxdv
t
uckrxdv
UART_TX_EN
t
txen
t
txhz


Html Pages

1  2  3  4  5  6  7  8  9  10  11  12  13  14  15  16  17  18  19  20  21  22  23  24  25  26  27  28  29  30  31  32  33  34  35  36 


Datasheet Download




Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ]  

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Alldatasheet API   |   Link Exchange   |   Manufacturer List
All Rights Reserved© Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn