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CS4970X4 Datasheet(PDF) 17 Page - Cirrus Logic

Part No. CS4970X4
Description  32-bit High Definition Audio Decoder DSP Family
Download  36 Pages
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Maker  CIRRUS [Cirrus Logic]
Homepage  http://www.cirrus.com
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CS4970X4 Datasheet(HTML) 17 Page - Cirrus Logic

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DS752PP7
Copyright 2008 Cirrus Logic
17
CS4970x4 Data Sheet
32-bit High Definition Audio Decoder DSP Family
Figure 6. Serial Control Port - I
2C Master Mode Timing
5.13 Switching Characteristics — Parallel Control Port - Intel Slave Mode
Parameter
Symbol
Min
Typical
Max
Unit
Address setup before PCP_CS# and PCP_RD# low or PCP_CS#
and PCP_WR# low
tias
5-
ns
Address hold time after PCP_CS# and PCP_RD# low or PCP_CS#
and PCP_WR# high
tiah
5-
ns
Read
Delay between PCP_RD# then PCP_CS# low or PCP_CS# then
PCP_RD# low
ticdr
0-
ns
Data valid after PCP_CS# and PCP_RD# low
tidd
-18
ns
PCP_CS# and PCP_RD# low for read
tirpw
24
-
ns
Data hold time after PCP_CS# or PCP_RD# high
tidhr
8-
ns
Data high-Z after PCP_CS# or PCP_RD# high
tidis
-18
ns
PCP_CS# or PCP_RD# high to PCP_CS# and PCP_RD# low for
next read1
tird
30
-
ns
PCP_CS# or PCP_RD# high to PCP_CS# and PCP_WR# low for
next write1
tirdtw
30
-
ns
PCP_RD# rising to PCP_IRQ# rising
tirdirqhl
-12
ns
Write
Delay between PCP_WR# then PCP_CS# low or PCP_CS# then
PCP_WR# low
ticdw
0-
ns
Data setup before PCP_CS# or PCP_WR# high
tidsu
8-
ns
PCP_CS# and PCP_WR# low for write
tiwpw
24
-
ns
Data hold after PCP_CS# or PCP_WR# high
tidhw
8-
ns
PCP_CS# or PCP_WR# high to PCP_CS# and PCP_RD# low for
next read1
tiwtrd
30
-
ns
PCP_CS# or PCP_WR# high to PCP_CS# and PCP_WR# low for
next write1
tiwd
30
-
ns
PCP_WR# rising to PCP_BSY# falling
tiwrbsyl
-2*DCLKP + 20
-
ns
SCP_CLK
SCP_SDA
0
1
6
780
1
7
tiicckl
tiicckh
tiicsu
tiich
A6
A0
R/W
ACK
LSB
8
ACK
MSB
tiicstp
6
tiicdov
tiicbft
tiicstscl
tiicckcmd
fiicck
tiicckcmd
tiicf
tiicr


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