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TDA8933B Datasheet(PDF) 4 Page - NXP Semiconductors |
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TDA8933B Datasheet(HTML) 4 Page - NXP Semiconductors |
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4 / 42 page  TDA8933B_1 © NXP B.V. 2008. All rights reserved. Preliminary data sheet Rev. 01 — 23 October 2008 4 of 42 NXP Semiconductors TDA8933B Class D audio amplifier 7. Pinning information 7.1 Pinning 7.2 Pin description Fig 2. Pin configuration diagram (HTSSOP32 package) TDA8933BTW VSSD(HW) VSSD(HW) IN1P OSCIO IN1N HVP1 DIAG VDDP1 ENGAGE BOOT1 POWERUP OUT1 CGND VSSP1 VDDA STAB1 VSSA STAB2 OSCREF VSSP2 HVPREF OUT2 INREF BOOT2 TEST VDDP2 IN2N HVP2 IN2P DREF VSSD(HW) VSSD(HW) 010aaa456 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 18 17 20 19 22 21 24 23 26 25 32 31 30 29 28 27 Table 3. Pinning description Symbol Pin Description VSSD(HW) 1 negative digital supply voltage and handle wafer connection IN1P 2 positive audio input for channel 1 IN1N 3 negative audio input for channel 1 DIAG 4 diagnostic output; open-drain ENGAGE 5 engage input to switch between Mute mode and Operating mode POWERUP 6 power-up input to switch between Sleep mode and Mute mode CGND 7 control ground; reference for POWERUP, ENGAGE and DIAG VDDA 8 positive analog supply voltage VSSA 9 negative analog supply voltage OSCREF 10 input internal oscillator setting (only master setting) HVPREF 11 decoupling of internal half supply voltage reference INREF 12 decoupling for input reference voltage TEST 13 test signal input; for testing purpose only IN2N 14 negative audio input for channel 2 IN2P 15 positive audio input for channel 2 VSSD(HW) 16 negative digital supply voltage and handle wafer connection VSSD(HW) 17 negative digital supply voltage and handle wafer connection DREF 18 decoupling of internal (reference) 5 V regulator for logic supply |
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