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SN65EPT22 Datasheet(PDF) 1 Page - Texas Instruments |
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SN65EPT22 Datasheet(HTML) 1 Page - Texas Instruments |
1 / 10 page 1 FEATURES APPLICATIONS DESCRIPTION PINOUT ASSIGNMENT 1 8 2 7 3 6 4 5 Q 0 Q 0 Q 1 Q 1 V CC D 0 D 1 GND LVTTL LVPECL SN65EPT22 www.ti.com............................................................................................................................................................................................ SLLS926 – DECEMBER 2008 3.3 V Dual LVTTL/LVCMOS to Differential LVPECL Buffer • Data and Clock Transmission Over Backplane • Dual 3.3V LVTTL to LVPECL Buffer • Signaling Level Conversion • Operating Range – LVPECL VCC = 3.0 V to 3.6 V With GND = 0 V The SN65EPT22 is a low power dual LVTTL to • Support for Clock Frequencies to 2.0 GHz (typ) LVPECL translator device. The device includes • 420 ps Typical Propagation Delay circuitry to maintain known logic HIGH level when • Deterministic HIGH Output Value for Open inputs are in open condition. The SN65EPT22 is Input Conditions housed in an industry standard SOIC-8 package and is also available in TSSOP-8 package option. • Built-in Temperature Compensation • Drop in Compatible to MC100ELT23 • PNP Single Ended Inputs for Minimal Loading Table 1. Pin Description PIN FUNCTION D0, D1 LVTTL data inputs Q0, Q0, Q1, Q1 LVPECL outputs VCC Positive supply GND Ground ORDERING INFORMATION(1) PART NUMBER PART MARKING PACKAGE LEAD FINISH SN65EPT22D SN65EPT22 SOIC NiPdAu SN65EPT22DGK SN65EPT22 SOIC-TSSOP NiPdAu (1) Leaded device options not initially available. Contact sales representative for further details. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Copyright © 2008, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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