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5962-01A1801QYC Datasheet(PDF) 6 Page - ATMEL Corporation |
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5962-01A1801QYC Datasheet(HTML) 6 Page - ATMEL Corporation |
6 / 17 page 29C516E 6 Rev. E (03 2007) 6. Syndrome Decoding The syndrome decoder generates the error flags CERR (Correctable ERRor) and NCERR (Non–Correctable ERRor). If a correctable error occurs, the 29C516E EDAC provides corrected data to the user. The inputs are the 8 syndrome bits from the syndrome generator, the 16 data bits from the memory and the control signal N22. N22 signal controls if 22 or 24 bits shall be decode from the entire memory word. Table 4: 6–Bit Syndrome Word to Bit–In–Error (N22=”1”) Hex 0 1 2 3 Syndrome Bit SY [..] 5 0 0 1 1 4 0 1 0 1 Hex 3 2 1 0 0 0 0 0 0 N.E.D MC4 MC5 D 1 0 0 0 1 MC0 D D MD7 2 0 0 1 0 MC1 D D MD11 3 0 0 1 1 D MD8 MD6 D 4 0 1 0 0 MC2 D D MD15 5 0 1 0 1 D MD5 MD12 D 6 0 1 1 0 D MD9 M D 7 0 1 1 1 M D D M 8 1 0 0 0 MC3 D D M 9 1 0 0 1 D M MD13 D A 1 0 1 0 D MD10 MD14 D B 1 0 1 1 MD4 D D M C 1 1 0 0 D MD2 MD3 D D 1 1 0 1 MD0 D D M E 1 1 1 0 MD1 D D M F 1 1 1 1 D M M D Note : N.E.D = No Errors Detected MDx = Memory Data Bit–In–Error MCx = Memory Check Bit–In–Error D = Double–Bit–In–Error Detected M = Multi–Bit–In–Error Detected |
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