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LPC2361 Datasheet(PDF) 12 Page - NXP Semiconductors |
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LPC2361 Datasheet(HTML) 12 Page - NXP Semiconductors |
12 / 50 page LPC2361_62_3 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 03 — 11 November 2008 12 of 50 NXP Semiconductors LPC2361/62 Single-chip 16-bit/32-bit MCU [1] 5 V tolerant pad providing digital I/O functions with TTL levels and hysteresis. [2] 5 V tolerant pad providing digital I/O functions (with TTL levels and hysteresis) and analog input. When configured as a DAC input, digital section of the pad is disabled. P4[28]/MAT2[0]/ TXD3 82[1] I/O P4[28] — General purpose digital input/output pin. O MAT2[0] — Match output for Timer 2, channel 0. O TXD3 — Transmitter output for UART3. P4[29]/MAT2[1]/ RXD3 85[1] I/O P4[29] — General purpose digital input/output pin. O MAT2[1] — Match output for Timer 2, channel 1. I RXD3 — Receiver input for UART3. TDO 1[1] O TDO — Test Data out for JTAG interface. TDI 2[1] I TDI — Test Data in for JTAG interface. TMS 3[1] I TMS — Test Mode Select for JTAG interface. TRST 4[1] I TRST — Test Reset for JTAG interface. TCK 5[1] I TCK — Test Clock for JTAG interface. This clock must be slower than 1 ⁄ 6 of the CPU clock (CCLK) for the JTAG interface to operate RTCK 100[1] I/O RTCK — JTAG interface control signal. Note: LOW on this pin while RESET is LOW enables ETM pins (P2[9:0]) to operate as trace port after reset. RSTOUT 14 O RSTOUT — This is a 3.3 V pin. LOW on this pin indicates LPC2361/62 being in Reset state. RESET 17[7] I External reset input: A LOW on this pin resets the device, causing I/O ports and peripherals to take on their default states, and processor execution to begin at address 0. TTL with hysteresis, 5 V tolerant. XTAL1 22[8] I Input to the oscillator circuit and internal clock generator circuits. XTAL2 23[8] O Output from the oscillator amplifier. RTCX1 16[8] I Input to the RTC oscillator circuit. RTCX2 18[8] O Output from the RTC oscillator circuit. VSS 15, 31, 41, 55, 72, 97, 83[9] I ground: 0 V reference. VSSA 11[10] I analog ground: 0 V reference. This should nominally be the same voltage as VSS, but should be isolated to minimize noise and error. VDD(3V3) 28, 54, 71, 96[11] I 3.3 V supply voltage: This is the power supply voltage for the I/O ports. VDD(DCDC)(3V3) 13, 42, 84[12] I 3.3 V DC-to-DC converter supply voltage: This is the supply voltage for the on-chip DC-to-DC converter only. VDDA 10[13] I analog 3.3 V pad supply voltage: This should be nominally the same voltage as VDD(3V3) but should be isolated to minimize noise and error. This voltage is used to power the ADC and DAC. VREF 12[13] I ADC reference: This should be nominally the same voltage as VDD(3V3) but should be isolated to minimize noise and error. Level on this pin is used as a reference for ADC and DAC. VBAT 19[13] I RTC power supply: 3.3 V on this pin supplies the power to the RTC peripheral. Table 3. Pin description …continued Symbol Pin Type Description |
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