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74LVT273 Datasheet(PDF) 9 Page - NXP Semiconductors |
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74LVT273 Datasheet(HTML) 9 Page - NXP Semiconductors |
9 / 17 page 74LVT273_3 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 03 — 10 September 2008 9 of 17 NXP Semiconductors 74LVT273 3.3 V octal D-type flip-flop see Table 8 for measurement points. VOL and VOH are typical output voltage levels that occur with the output load. Fig 7. MR pulse width, MR to CP recovery time and MR to Qn delay 001aai740 MR input CP input Qn output tPHL tWL trec VM VI GND VI VOL GND VM VM VOH see Table 8 for measurement points. VOL and VOH are typical output voltage levels that occur with the output load. The shaded areas indicate when the input is permitted to change for predicable output performance. Fig 8. Data set-up and hold times 001aai741 GND GND th(H) tsu(H) th(L) tsu(L) VM VM VM VI VOH VOL VI Qn output CP input Dn input |
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