74LVT273_3

© NXP B.V. 2008. All rights reserved.

Product data sheet

Rev. 03 — 10 September 2008

9 of 17

NXP Semiconductors

74LVT273

3.3 V octal D-type flip-flop

see Table 8 for measurement points.

Fig 7.

MR pulse width, MR to CP recovery time and MR to Qn delay

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MR input

CP input

Qn output

GND

GND

see Table 8 for measurement points.

The shaded areas indicate when the input is permitted to change for predicable output performance.

Fig 8.

Data set-up and hold times

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GND

GND

Qn output

CP input

Dn input