CY7C6431x
CY7C64345, CY7C6435x
Document Number: 001-12394 Rev. *F
Page 6 of 29
Pin Configuration
The enCoRe V USB device is available in a variety of packages which are listed and illustrated in the subsequent tables.
16-Pin Part Pinout
Figure 1. CY7C64315/CY7C64316 16-Pin enCoRe V Device
QFN
(Top View)
P2[3]
P1[5]
P1[1]
P0[4]
P1[0]
P1[7]
P1[4]
XRES
1
2
3
4
12
11
10
9
Notes
1. During power up or reset event, device P1[0] and P1[1] may disturb the I2C bus. Use alternate pins if issues are encountered.
2. These are the in-system serial programming (ISSP) pins that are not High Z at power on reset (POR).
Table 1. 16-Pin Part Pinout (QFN)
Pin No.
Type
Name
Description
1
IO
P2[3]
Digital IO, Crystal Input (Xin)
2
IOHR
P1[7]
Digital IO, SPI SS, I2C SCL
3
IOHR
P1[5]
Digital IO, SPI MISO, I2C SDA
4IOHR
P1[1](1, 2)
Digital IO, ISSP CLK, 12C SCL, SPI MOSI
5
Power
Vss
Ground connection
6
USB line
D+
USB PHY
7
USB line
D–
USB PHY
8
Power
Vdd
Supply
9IOHR
P1[0](1, 2)
Digital IO, ISSP DATA, I2C SDA, SPI CLK
10
IOHR
P1[4]
Digital IO, optional external clock input (EXTCLK)
11
Input
XRES
Active high external reset with internal pull down
12
IOH
P0[4]
Digital IO
13
IOH
P0[7]
Digital IO
14
IOH
P0[3]
Digital IO
15
IOH
P0[1]
Digital IO
16
IO
P2[5]
Digital IO, Crystal Output (Xout)
LEGEND I = Input, O = Output, OH = 5 mA High Output Drive, R = Regulated Output
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