CY2DP814 datasheet(2/9 Pages) CYPRESS

Part #	CY2DP814

Description	1:4 Clock Fanout Buffer

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Manufacturer	CYPRESS [Cypress Semiconductor]

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CY2DP814

Document #: 38-07060 Rev. *E

Page 2 of 9

Pin Configuration

Figure 1. 16-Pin TSSOP/SOIC

Pin Description

Pin Number

Pin Name

Pin Standard Interface

Description

6, 7

IN+, IN–

Configurable

Differential input pair or single line. LVPECL default.

See CONFIG below.

2

CONFIG

LVTTL/LVCMOS

Converts inputs from the default

LVPECL/LVDS

(logic = 0)

to

LVTTL/LVCMOS

(logic = 1).

See Figure 6 and Figure 7 for additional information

1, 8

EN1, EN2

LVTTL/LVCMOS

Enable/disable logic. See Function Table below for

details.

16, 15, 14, 13, 12, 11, 10, 9

Q1A, Q1B,

Q2A, Q2B,

Q3A, Q3B,

Q4A, Q4B

LVPECL

Differential outputs.

3, 4

VDD

POWER

Positive supply voltage.

5GND

POWER

Ground.

16

15

14

13

12

11

10

9

1

2

3

4

5

6

7

8

16 pin TSSOP / SOIC

EN1

CONFIG

VDD

IN+

IN-

EN2

GND

Q1A

Q1B

Q2A

Q2B

Q3A

Q3B

Q4A

Q4B

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