80V, 300mW Boost Converter and Current

Monitor for APD Bias Applications

_______________________________________________________________________________________

9

Pin Description

PIN

NAME

FUNCTION

1

PWR

Boost Converter Input Voltage. PWR powers the switch driver and charge pump. Bypass PWR to PGND with a

ceramic capacitor of 1µF minimum value.

2CP

Positive Terminal of the Charge-Pump Flying Capacitor for 2.7V to 5.5V Supply Voltage Operation. Connect

CP to IN when the input voltage is in the 5.5V to 11V range.

3CN

Negative Terminal of the Charge-Pump Flying Capacitor for 2.7V to 5.5V Supply Voltage Operation. Leave CN

unconnected when the input voltage is in the 5.5V to 11V range.

4IN

Input Supply Voltage. IN powers all blocks of the MAX15031 except the switch driver and charge pump.

Bypass IN to PGND with a ceramic capacitor of 1µF minimum value.

5

SGND

Signal Ground. Connect directly to the local ground plane. Connect SGND to PGND at a single point, typically

near the return terminal of the output capacitor.

6FB

7

CNTRL

Control Input for Boost Converter Output-Voltage Programmability. Allows the feedback set-point voltage to be

set externally by CNTRL when CNTRL is less than 1.245V. Pull CNTRL above 1.5V (typ) to use the internal

1.245V (typ) feedback set-point voltage.

8

ILIM

Open-Drain Current-Limit Indicator. ILIM asserts low when the APD current limit has been exceeded.

9

RLIM

Current-Limit Resistor Connection. Connect a resistor from RLIM to SGND to program the APD current-limit

threshold.

10

MOUT

11

CLAMP

Clamp Voltage Input. CLAMP is the external potential used for voltage clamping of MOUT.

12

APD

Reference Current Output. APD provides the source current to the cathode of the photodiode.

13

BIAS

filter for ripple attenuation. BIAS provides the voltage bias for the current monitor and is the current source for

APD.

14

SHDN

Active-Low Shutdown Control Input. Apply a logic-low voltage to SHDN to shut down the device and reduce

15

PGND

Power Ground. Connect the negative terminals of the input and output capacitors to PGND. Connect PGND

externally to SGND at a single point, typically at the return terminal of the output capacitor.

16

LX

Drain of Internal 80V n-Channel DMOS. Connect inductor and diode to LX. Minimize the trace area at LX to

reduce switching noise emission.

—EP

Exposed Pad. Connect EP to a large contiguous copper plane at SGND potential to improve thermal

dissipation. Do not use as the main SGND connection.