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MC10XS3412 Datasheet(PDF) 31 Page - Freescale Semiconductor, Inc |
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MC10XS3412 Datasheet(HTML) 31 Page - Freescale Semiconductor, Inc |
31 / 51 page Analog Integrated Circuit Device Data Freescale Semiconductor 31 10XS3412 FUNCTIONAL DEVICE OPERATION PROTECTION AND DIAGNOSTIC FEATURES The SPI fault report (SC[0:3] bits) is removed after a read operation. Over-voltage Fault (Enabled by default) By default, the over-voltage protection is enabled. The 10XS3412 shuts down all outputs and FS will go to logic [0] during an over-voltage fault condition on the VPWR pin (VPWR > VPWR(OV)). The outputs remain in the OFF state until the over-voltage condition is removed (VPWR < VPWR(OV) - VPWR(OVHYS)). When experiencing this fault, the OVF fault bit is set to logic [1] and cleared after either a valid SPI read. The over-voltage protection can be disabled through SPI (OV_dis bit is disabled set to logic [1]). The fault register reflects any over-voltage condition (VPWR > VPWR(OV)). This over-voltage diagnosis, as a warning, is removed after a read operation, if the fault condition disappears. The HS[0:3] outputs are not commanded in RDS(ON) above the OV threshold. In Fail-safe Mode, the over-voltage activation depends on the RST logic state: enable for RST = 1 and disable for RST = 0. The device is still protected with over-temperature protection in case the over-voltage feature is disabled. Under-voltage Fault The output(s) will latch off at some battery voltage below VPWR(UV). As long as the VDD level stays within the normal specified range, the internal logic states within the device will remain (configuration and reporting). In the case where battery voltage drops below the under- voltage threshold (VPWR < VPWR(UV)), the outputs will turn off, FS will go to logic [0], and the fault register UV bit will be set to [1]. Two cases need to be considered when the battery level recovers (VPWR > VPWR(UV)_UP): •If outputs command are low, FS will go to logic [1] but the UV bit will remain set to 1 until the next read operation (warning report). •If the output command is ON, FS will remain at logic [0]. To delatch the fault and be able to turn ON again the outputs, the failure condition must disappear and the autoretry circuitry must be active or the corresponding output must be commanded OFF and then ON (toggling fault_control signal of corresponding output) or VSUPPLY(POR) condition if VDD = 0. In extended mode, the output is protected by over- temperature shutdown circuitry. All previous latched faults, occurred when VPWR was within the normal voltage range, are guaranteed if VDD is within the operational voltage range or until VSUPPLY(POR) if VDD = 0. Any new OT fault is detected (VDD failure included) and reported through SPI above VPWR(UV). The output state is not changed as long as the VPWR voltage does not drop any lower than 3.5V typical. All latched faults (over-temperature, over-current, severe short-circuit, over and under-voltage) are reset if: •VDD < VDD(FAIL) with VPWR in nominal voltage range, •VDD and VPWR supplies is below VSUPPLY(POR) voltage value. |
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