AD9717BCPZRL7 datasheet(10/48 Pages) AD

Part #	AD9717BCPZRL7

Description	Dual, 8-/10-/12-/14-Bit Low Power Digital-to-Analog Converters

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Manufacturer	AD [Analog Devices]

Direct Link	http://www.analog.com

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AD9714/AD9715/AD9716/AD9717

Rev. 0 | Page 10 of 48

Pin No.

Mnemonic

Description

35

RESET/PINMD

Reset. In SPI mode, pulse RESET high to reset SPI registers to default values.

Pin Mode. A constant Logic 1 puts the device into pin mode.

36

SCLK/CLKMD

Serial Clock. Clock input for serial port in spi mode

Clock Mode. In pin mode, CLKMD determines phase of internal retiming clock.

DCLKIO = CLKIN: Tie to 0.

DCLKIO ≠ CLKIN: Pulse 0 to 1 to edge trigger the internal retimer (see the Retimer section).

37

SDIO/FORMAT

Serial Port Input/Output. Bidirectional data line for serial port in spi mode.

Data Format. In pin mode, FORMAT determines data format of digital data.

38

CS/PWRDN

Chip Select. Active low chip select in spi mode.

Power Down. In pin mode, PWRDN powers down the device except for the SPI port.

39

DB13 (MSB)

Digital Input (MSB).

40

DB12

Digital Input.

Heat Sink Pad

The heat sink pad is connected to AVSS and should be soldered to the ground plane. Exposed metal at package

corners is connected to this pad.

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