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LTC2306IDD-TRPBF Datasheet(PDF) 11 Page - Linear Technology |
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LTC2306IDD-TRPBF Datasheet(HTML) 11 Page - Linear Technology |
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11 / 20 page  LTC2302/LTC2306 11 23026f BLOCK DIAGRAM TEST CIRCUITS TIMING DIAGRAMS Voltage Waveforms for SDO Delay Times, tdDO and thDO Voltage Waveforms for tdis Load Circuit for tdis Waveform 1 Load Circuit for tdis Waveform 2, ten SDI SDO SCK CONVST 23026 BD SERIAL PORT ANALOG INPUT MUX CH0 (IN+) CH1 (IN–) VREF LTC2302 LTC2306 PIN NAMES IN PARENTHESIS REFER TO LTC2302 VDD OVDD GND 12-BIT 500ksps ADC + – SDO TEST POINT VDD 3k CL 23026 TC01 SDO TEST POINT 3k CL 23026 TC02 SCK SDO VIL tdDO thDO VOH VOL 23026 TD01 SDO WAVEFORM 1 (SEE NOTE 1) VIH tdis 90% 10% SDO WAVEFORM 2 (SEE NOTE 2) CONVST NOTE 1: WAVEFORM 1 IS FOR AN OUTPUT WITH INTERNAL CONDITIONS SUCH THAT THE OUTPUT IS HIGH UNLESS DISABLED BY THE OUTPUT CONTROL NOTE 2: WAVEFORM 2 IS FOR AN OUTPUT WITH INTERNAL CONDITIONS SUCH THAT THE OUTPUT IS LOW UNLESS DISABLED BY THE OUTPUT CONTROL 23026 TD02 |
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