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LTC2309CUF-TRPBF Datasheet(PDF) 5 Page - Linear Technology |
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LTC2309CUF-TRPBF Datasheet(HTML) 5 Page - Linear Technology |
5 / 20 page LTC2309 5 2309f I2C TIMING CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 4) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS fSCL SCL Clock Frequency l 400 kHz tHD(SDA) Hold Time (Repeated) Start Condition l 0.6 μs tLOW Low Period of the SCL Pin l 1.3 μs tHIGH High Period of the SCL Pin l 0.6 μs tSU(STA) Set-Up Time for a Repeated Start Condition l 0.6 μs tHD(DAT) Data Hold Time l 0 0.9 μs tSU(DAT) Data Set-Up Time l 100 ns tr Rise Time for SDA/SCL Signals (Note 12) l 20 + 0.1CB 300 ns tf Fall Time for SDA/SCL Signals (Note 12) l 20 + 0.1CB 300 ns tSU(STO) Set-Up Time for Stop Condition l 0.6 μs tBUF Bus Free Time Between a Stop and Start Condition l 1.3 μs ADC TIMING CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 4) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS fSMPL Throughput Rate (Successive Reads) l 14 ksps tCONV Conversion Time (Note 9) l 1.3 1.8 μs tACQ Acquisition Time (Note 9) l 240 ns tREFWAKE REFCOMP Wake-Up Time (Note 13) CREFCOMP = 10μF, CREF = 2.2μF 200 ms Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: All voltage values are with respect to ground with AVDD and DVDD wired together (unless otherwise noted). Note 3: When these pin voltages are taken below ground or above VDD, they will be clamped by internal diodes. These products can handle input currents greater than 100mA below ground or above VDD without latchup. Note 4: AVDD = 5V, DVDD = 5V, fSMPL = 14ksps internal reference unless otherwise noted. Note 5: Linearity, offset and full-scale specifications apply for a single-ended analog input with respect to COM. Note 6: Integral nonlinearity is defined as the deviation of a code from a straight line passing through the actual endpoints of the transfer curve. The deviation is measured from the center of the quantization band. Note 7: Bipolar zero error is the offset voltage measured from –0.5LSB when the output code flickers between 0000 0000 0000 and 1111 1111 1111. Unipolar zero error is the offset voltage measured from +0.5LSB when the output code flickers between 0000 0000 0000 and 0000 0000 0001. Note 8: Full-scale bipolar error is the worst-case of –FS or +FS untrimmed deviation from ideal first and last code transitions and includes the effect of offset error. Unipolar full-scale error is the deviation of the last code transition from ideal and includes the effect of offset error. Note 9: Guaranteed by design, not subject to test. Note 10: All specifications in dB are referred to a full-scale ±2.048V input with a 2.5V reference voltage. Note 11: Full linear bandwidth is defined as the full-scale input frequency at which the SINAD degrades to 60dB or 10 bits of accuracy. Note 12: CB = capacitance of one bus line in pF (10pF ≤ CB ≤ 400pF). Note 13: REFCOMP wake-up time is the time required for the REFCOMP pin to settle within 0.5LSB at 12-bit resolution of its final value after waking up from SLEEP mode. |
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