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LTC2308CUFXTRPBF Datasheet(PDF) 8 Page - Linear Technology |
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LTC2308CUFXTRPBF Datasheet(HTML) 8 Page - Linear Technology |
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8 / 20 page  LTC2308 8 2308f PIN FUNCTIONS CH3-CH7 (Pins 1, 2, 3, 4, 5): Channel 3 to Channel 7 Analog Inputs. CH3 – CH7 can be configured as single- ended or differential input channels. See the Analog Input Multiplexer section. COM (Pin 6): Common Input. This is the reference point for all single-ended inputs. It must be free of noise and connected to ground for unipolar conversions and midway between GND and REFCOMP for bipolar conversions. VREF (Pin 7): 2.5V Reference Output. Bypass to GND with a minimum 2.2μF tantalum capacitor or low ESR ceramic capacitor. The internal reference may be over driven by an external 2.5V reference at this pin. REFCOMP (Pin 8): Reference Buffer Output. Bypass to GND with a 10μF tantalum and 0.1μF ceramic capacitor in parallel. Nominal output voltage is 4.096V. GND (Pins 9, 10, 11, 18, 20): Ground. All GND pins must be connected to a solid ground plane. AVDD (Pins 12, 13):5V Analog Supply. The range of AVDD is 4.75V to 5.25V. Bypass AVDD to GND with a 0.1μF ceramic and a 10μF tantalum capacitor in parallel. CONVST (Pin 14): Conversion Start. A rising edge at CONVSTbeginsaconversion.Forbestperformance,ensure that CONVST returns low within 40ns after the conversion starts or after the conversion ends. SDI (Pin 15): Serial Data Input. The SDI serial bit stream configures the ADC and is latched on the rising edge of the first 6 SCK pulses. SCK (Pin 16): Serial Data Clock. SCK synchronizes the serial data transfer. The serial data input at SDI is latched on the rising edge of SCK. The serial data output at SDO transitions on the falling edge of SCK. SDO (Pin 17): Serial Data Out. SDO outputs the data from the previous conversion. SDO is shifted out serially on the falling edge of each SCK pulse. OVDD (Pin 19): Output Driver Supply. Bypass OVDD to GND with a 0.1μF ceramic capacitor close to the pin. The range of OVDD is 2.7V to 5.25V. DVDD (Pin 21): 5V Digital Supply. The range of DVDD is 4.75V to 5.25V. Bypass DVDD to GND with a 0.1 μF ceramic and a 10μF tantalum capacitor in parallel. CH0-CH2 (Pins 22, 23, 24): Channel 0 to Channel 2 Analog Inputs. CH0 – CH2 can be configured as single- ended or differential input channels. See the Analog Input Multiplexer section. GND (Pin 25): Exposed Pad Ground. Must be soldered directly to ground plane. |
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