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TDA9105 Datasheet(PDF) 6 Page - STMicroelectronics

Part No. TDA9105
Description  DEFLECTION PROCESSOR FOR MULTISYNC MONITORS
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Maker  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
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TDA9105 Datasheet(HTML) 6 Page - STMicroelectronics

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HORIZONTAL SECTION (continued)
Electrical Characteristics (VCC = 12V, Tamb =25
°C)
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
SUPPLY AND REFERENCE VOLTAGES
VCC
Supply Voltage (Pin 18)
10.8
12
13.2
V
ICC
Supply Current (Pin 18)
See Figure 1
40
60
mA
VREF-H
Reference Voltage for Horizontal Section (Pin 7)
I = 2mA
7.4
8
8.6
V
IREF-H
Max Sourced Current on VREF-H (Pin 7)
5
mA
VREF-V
Reference Voltage for Vertical Section (Pin 26)
I = 2mA
7.4
8
8.6
V
IREF-V
Max Sourced Current on VREF-V (Pin 26)
5
mA
INPUT SECTION/PLL1
VINTH
Horizontal Input Threshold Voltage (Pin 17)
Low level voltage
High level voltage
2
0.8
V
VVCO
VCO Control Voltage (Pin 12)
VREF-H = 8V
1.6 to 6.2
V
VCOG
VCO Gain, dF/dV (Pin 12)
R0 = 6.49k
Ω, C0 = 680pF
17
kHz/V
Hph
Horizontal Phase Adjust (Pin 15)
% of Horizontal period
±12.5
%
f0
Free Running Frequency (adjustable by changing R0) R0 = 6.49k
Ω, C0 = 680pF
25
27
29
kHz
CR
PLL1 Capture Range
Fh Min
Fh Max
R0 = 6.49k
Ω, C0 = 680pF
See conditions on Fig. 1
f0
3.7 x f0
kHz
kHz
PLLinh
PLL 1 Inhibition (Pin 14)
PLL ON
(Typ. Threshold = 1.6V)
PLL OFF
V14
V14
2
0.8
V
V
IHLock0
Max Output Current on HLock Output
I2
10
mA
VHLock0
Low Level Voltage on HLock Output
V2 with I2 = 10mA
0.25
0.5
V
SECOND PLL AND HORIZONTAL OUTPUT SECTION
FBth
Flyback Input Threshold Voltage (Pin 5)
See Figure 14
0.65
0.75
V
Hjit
Horizontal Jitter
See Application Diagram
(Pins 8-9)
80
ppm
HDmin
HDmax
Horizontal Drive Output Duty-cycle
(Pin 20 or 21) (see Note)
Minimum
Maximum
V4 =2V
V4 =6V
V4 =VREF - 100mV
32
53.5
57.5
34
56
60
36
58.5
62.5
%
%
%
HDvd
Horizontal Drive Low Level Output Voltage
Pin 20 to GND,
V21-V20,IOUT = 20mA
1.1
1.7
V
HDem
Horizontal Drive High Level Output Voltage
(output on Pin 20)
Pin 21 to VCC,
IOUT = 20mA
9.5
10
V
XRAYth X-RAY Protection Input Threshold Voltage (Pin 16)
TBD
8
TBD
V
ISblkO
Maximum Output Current on Composite
Blanking Output
I22
10
mA
VSblkO
Low-Level Voltage on Composite Blanking
Output (Blanking ON)
V22 with I22 = 10mA
0.25
0.5
V
ISmoiO
Maximum Output Current on Moire Output
I23
10
mA
VSmoiO Low-Level Voltage on Moire Output
V23 with I23 = 10mA
0.25
0.5
V
Vphi2
Internal Clamping Voltage on 2nd PLL Loop
Filter Output (Pin 3)
Vmin
Vmax
1.6
3.2
V
V
VOFF
Threshold Voltage to Stop H-out, V-out and to
Activate BLKout (OFF Mode when V4 <VOFF)
(Pin 4)
V4
1V
VSCinh
Supply Voltage to Stop H-out, V-out when
VCC < VSCinh (Pin 18)
TBD
7.5
V
Note :
If H-drive is taken on Pin 20 (Pin 21 connected to supply), H-D is the ratio of low level duration to horizontal period.
If H-drive is taken on Pin 21 (Pin 20 grounded), H-D is the ratio of high level duration to horizontal period.
In both cases, H-D period driving horizontal scanning transistor off.
TDA9105
6/32


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