Electronic Components Datasheet Search
  English  ▼

Delete All
ON OFF
ALLDATASHEET.COM

X  

Preview PDF Download HTML

TDA7401 Datasheet(PDF) 5 Page - STMicroelectronics

Part No. TDA7401
Description  DIGITALLY CONTROLLED AUDIO PROCESSOR WITH LOUDSPEAKERS EQUALIZER
Download  10 Pages
Scroll/Zoom Zoom In 100% Zoom Out
Maker  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

TDA7401 Datasheet(HTML) 5 Page - STMicroelectronics

  TDA7401 Datasheet HTML 1Page - STMicroelectronics TDA7401 Datasheet HTML 2Page - STMicroelectronics TDA7401 Datasheet HTML 3Page - STMicroelectronics TDA7401 Datasheet HTML 4Page - STMicroelectronics TDA7401 Datasheet HTML 5Page - STMicroelectronics TDA7401 Datasheet HTML 6Page - STMicroelectronics TDA7401 Datasheet HTML 7Page - STMicroelectronics TDA7401 Datasheet HTML 8Page - STMicroelectronics TDA7401 Datasheet HTML 9Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 5 / 10 page
background image
Figure 4. Timing Diagram of I
2CBUS
Figure 3. Data Validity on the I
2CBUS
I
2C BUS INTERFACE
Data transmission from microprocessor to the
TDA7401 and viceversa takes place thru the 2
wires I
2C BUS interface, consisting of the two
lines SDA and SCL (pull-up resistors to positive
supply voltage must be externally connected).
Data Validity
As shown in fig. 2, the data on the SDA line must
be stable during the high period of the clock. The
HIGH and LOW state of the data line can only
change when the clock signal on the SCL line is
LOW.
Start and Stop Conditions
As shown in fig.3 a start condition is a HIGH to
LOW transition of the SDA line while SCL is
HIGH. The stop condition is a LOW to HIGH tran-
sition of the SDA line while SCL is HIGH.
A STOP conditions must be sent before each
START condition.
Byte Format
Every byte transferred to the SDA line must con-
tain 8 bits. Each byte must be followed by an ac-
knowledge bit. The MSB is transferred first.
Acknowledge
The master (
µP) puts a resistive HIGH level on the
SDA line during the acknowledge clock pulse (see
fig. 4). The peripheral (audioprocessor) that ac-
knowledges has to pull-down (LOW) the SDA line
during the acknowledge clock pulse, so that the
SDA line is stable LOW during this clock pulse.
The audioprocessor which has been addressed
has to generate an acknowledge after the recep-
tion of each byte, otherwise the SDA line remains
at the HIGH level during the ninth clock pulse time.
In this case the master transmitter can generate
the STOP information in order to abort the transfer.
Transmission without Acknowledge
Avoiding to detect the acknowledge of the audio-
processor, the
µP can use a simplier transmis-
sion: simply it waits one clock without checking
the slave acknowledging, and sends the new
data.
This approach of course is less protected from
misworking and decreases the noise immunity.
Figure 5. Acknowledge on the I
2CBUS
TDA7401
5/10


Html Pages

1  2  3  4  5  6  7  8  9  10 


Datasheet Download

Go To PDF Page


Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ]  

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Alldatasheet API   |   Link Exchange   |   Manufacturer List
All Rights Reserved© Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn