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IS24C32C-3PLA3 Datasheet(PDF) 3 Page - Integrated Silicon Solution, Inc |
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IS24C32C-3PLA3 Datasheet(HTML) 3 Page - Integrated Silicon Solution, Inc |
3 / 20 page Integrated Silicon Solution, Inc. 3 Rev. B 1/04/08 IS24C32C PIN DESCRIPTIONS A0-A2 Address Inputs SDA Serial Address/Data I/O SCL Serial Clock Input WP Write Protect Input Vcc Power Supply GND Ground SCL This input clock pin is used to synchronize the data transfer to and from the device. SDA The SDA is a Bi-directional pin used to transfer addresses and data into and out of the device. The SDA pin is an open drain output and can be wire-Ored with other open drain or open collector outputs. The SDA bus requires a pullup resistor to Vcc. A0, A1, A2 The A0, A1 and A2 are the device address inputs that are hardwired or left not connected for hardware compatibility with the 24C16. When pins are hardwired, as many as eight 32K devices may be addressed on a single bus system. When the pins are not hardwired, the default values of A0, A1, and A2 are zero. WP WP is the Write Protect pin. The input level determines if all or none of the array is protected from modifications. PIN CONFIGURATION 8-Pin DIP, SOIC, TSSOP, and MSOP 1 2 3 4 8 7 6 5 A0 A1 A2 GND VCC WP SCL SDA Write Protection ArrayAddressesProtected WP IS24C32C GNDorfloating None Vcc EntireArray 8-pad DFN (Top View) 1 2 3 4 8 7 6 5 A0 A1 A2 GND VCC WP SCL SDA |
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