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M38044FFKP Datasheet(PDF) 72 Page - Renesas Technology Corp |
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M38044FFKP Datasheet(HTML) 72 Page - Renesas Technology Corp |
72 / 387 page 1-54 REJ09B0212-0100Z Rev.1.00 Jan 14, 2005 3804 Group (Spec.H) HARDWARE FUNCTIONAL DESCRIPTION PULSE WIDTH MODULATION (PWM) The 3804 group (Spec. H) has PWM functions with an 8-bit reso- lution, based on a signal that is the clock input XIN or that clock input divided by 2 or the clock input XCIN or that clock input di- vided by 2 in low-speed mode. Data Setting The PWM output pin also functions as port P56. Set the PWM pe- riod by the PWM prescaler, and set the “H” term of output pulse by the PWM register. If the value in the PWM prescaler is n and the value in the PWM register is m (where n = 0 to 255 and m = 0 to 255) : PWM period = 255 ✕ (n+1) / f(XIN) = 31.875 ✕ (n+1) µs (when f(XIN) = 8 MHz) Output pulse “H” term = PWM period ✕ m / 255 = 0.125 ✕ (n+1) ✕ m µs (when f(XIN) = 8 MHz) Fig. 45 Timing of PWM period Fig. 46 Block diagram of PWM function PWM Operation When bit 0 (PWM enable bit) of the PWM control register is set to “1”, operation starts by initializing the PWM output circuit, and pulses are output starting at an “H”. If the PWM register or PWM prescaler is updated during PWM output, the pulses will change in the cycle after the one in which the change was made. 31.875 ✕ m ✕(n+1) 255 µs T = [31.875 ✕ (n+1)] µs PWM output m: Contents of PWM register n : Contents of PWM prescaler T : PWM period (when f(XIN) = 8 MHz Data bus Count source selection bit “0” “1” PWM prescaler pre-latch PWM register pre-latch PWM prescaler latch PWM register latch Transfer control circuit PWM register 1/2 XIN or XCIN Port P56 latch PWM enable bit Port P56 PWM prescaler |
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