LE24CB642

No.1330-5/12

Pin Functions

SCL (serial clock input) pin

The SCL pin is a serial clock input pin that processes signals at the rising and falling edges of SCL clock signals.

SDA (serial data input/output) pin

The SDA pin is used to transfer serial data to the input/output, and it consists of a signal input pin and n-channel

transistor open drain output pin.

Like the SCL pin, the SDA pin must be pulled up by a resistor to the VDD level and wired-ORed with an open drain

(or open collector) output device for use.

WP (write protect) pin

When the WP pin is high, write protection is enabled, and writing into the 64k bit memory areas is prohibited. When

the pin is low, writing is possible to all memory areas. Read operations can be performed regardless of the WP pin

status.

Functional Description

1 Start condition

When the SCL line is at the high level, the start condition is established by changing the SDA line from high to low.

The operation of the EEPROM as a slave starts in the start condition.

2 Stop condition

When the SCL line is at the high level, the stop condition is established by changing the SDA line from low to high.

When the device is set up for the read sequence, the read operation is suspended when the stop condition is received,

and the device is set to standby mode. When it is set up for the write sequence, the capture of the write data is ended

when the stop condition is received, and the EEPROM internal write operation is started.

3 Data transfer

Data is transferred by changing the SDA line while the SCL line is low. When the SDA line is changed while the SCL

line is high, the resulting condition will be recognized as the start or stop condition.

Stop

condition

Start

condition

SCL

SDA

tSU.STA tHD.STA

tSU.STO

SCL

SDA

tSU.DAT

tHD.DAT