LC87F1HC8SA

No.A1095-17/27

3. SIO4 Serial I/O Characteristics (Note 4-3-1)

Specification

Parameter

Symbol

Pin/

Remarks

Conditions

VDD[V]

min

typ

max

unit

Frequency

tSCK(5)

2

Low level

pulse width

tSCKL(5)

1

tSCKH(5)

See Fig. 8.

1

tSCKHA(5a)

• USB, SIO0 continuous transfer

mode, AIF, SIO9, and DMCOPY

not used at the same time.

• See Fig. 8.

• (Note 4-3-2)

4

tSCKHA(5b)

• USB used at the same time

• SIO0 continuous transfer mode,

AIF, SIO9, DMCOPY not used at

the same time.

• See Fig. 8.

• (Note 4-3-2)

7

High level

pulse width

tSCKHA(5c)

SCK4(P24)

• USB, SIO0 continuous transfer

mode, SIO9, and DMCOPY used

at the same time.

• AIF not used at the same time.

• See Fig. 8.

• (Note 4-3-2)

2.7 to 5.5

12

Frequency

tSCK(6)

4/3

tCYC

Low level

pulse width

tSCKL(6)

1/2

tSCKH(6)

• When CMOS output type is

selected.

• See Fig. 8.

1/2

tSCK

tSCKHA(6a)

• USB, SIO0 continuous transfer

mode, AIF, SIO9, and DMCOPY

not used at the same time.

• When CMOS output type is

selected.

• See Fig. 8.

tSCKH(6)

+

(5/3)tCYC

tSCKH(6)

+

(10/3)tCYC

tSCKHA(6b)

• USB used at the same time.

• SIO0 continuous transfer mode,

AIF, SIO9, and DMCOPY not

used at the same time.

• When CMOS output type is

selected.

• See Fig. 8.

tSCKH(6)

+

(5/3)tCYC

tSCKH(6)

+

(19/3)tCYC

High level

pulse width

tSCKHA(6c)

SCK4(P24)

• USB, SIO0 continuous transfer

mode, SIO9, and DMCOPY used

at the same time.

• AIF not used at the same time.

• When CMOS output type is

selected.

• See Fig. 8.

2.7 to 5.5

tSCKH(6)

+

(5/3)tCYC

tSCKH(6)

+

(34/3)tCYC

tCYC

Note 4-3-1: These specifications are theoretical values. Margins must be allowed according to the actual operating

conditions.

Note 4-3-2: In an application where the serial clock input is to be used in the continuous data transfer mode, the time

from SI4RUN being set when serial clock is high to the falling edge of the first serial clock must be longer

than tSCKHA.

Continued on next page.