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TLC5944RHBT Datasheet(PDF) 5 Page - Texas Instruments |
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TLC5944RHBT Datasheet(HTML) 5 Page - Texas Instruments |
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5 / 34 page  100 3V 1V - ´ (I atV =1V) OUTn OUTn (I atV =3V) (I atV =1V) - OUTn OUTn OUTn OUTn D (%/V)= SWITCHING CHARACTERISTICS TLC5944 www.ti.com ...................................................................................................................................................................................................... SBVS112 – JUNE 2008 ELECTRICAL CHARACTERISTICS (continued) At VCC = 3.0 V to 5.5 V and TA = –40°C to +85°C. Typical values at VCC = 3.3 V and TA = +25°C, unless otherwise noted. TLC5944 PARAMETER TEST CONDITIONS MIN TYP MAX UNIT All OUTn = ON, DCn = 3Fh, VOUTn = 1 V to 3 V, ΔIO(LC3) Load regulation(4) ±1 ±3 %/V RIREF = 820 Ω, at OUT0 to OUT15 VUP = 3 V, VOUTn = 1 V, BLANK = high, RPCHG Pre-charge FET on-resistance 1 3 k Ω OUT0 to OUT15 T(TEF) Thermal error flag threshold Junction temperature(5) +150 +162 +175 °C T(HYST) Thermal error flag hysteresis Junction temperature(5) +5 +10 +20 °C T(PTW) Pre-thermal warning threshold Junction temperature(5) +105 +120 +135 °C T(HYSP) Pre-thermal warning hysteresis Junction temperature(5) +5 +10 +20 °C VLOD LED open detection threshold All OUTn = ON 0.2 0.3 0.4 V VIREF Reference voltage output RIREF = 820 Ω 1.16 1.20 1.24 V (4) Load regulation is calculated by the equation: (5) Not tested. Specified by design. At VCC = 3.0 V to 5.5 V, TA = –40°C to +85°C, CL = 15 pF, RL = 68 Ω, RIREF = 820 Ω, VLED = 5.0 V, and VUP = 5.0 V. Typical values at VCC = 3.3 V and TA = +25°C, unless otherwise noted. TLC5944 PARAMETER TEST CONDITIONS MIN TYP MAX UNIT tR0 SOUT (see Figure 6) 16 Rise time ns tR1 OUTn, DCn = 3Fh (see Figure 5) 10 30 tF0 SOUT (see Figure 6) 16 ns tF1 OUTn, DCn = 3Fh (see Figure 5) 10 30 Fall time XERR, CL XERR = 100 pF, RL XERR = 1 kΩ, tF2 50 ns VXERR = 5 V (see Figure 7) tD0 SCLK ↑ to SOUT 25 ns tD1 DCSEL to SOUT 25 ns tD2 BLANK ↑ to OUT0 sink current off 20 40 ns tD3 GSCLK ↑ to OUT0/4/8/12 5 18 40 ns tD4 GSCLK ↑ to OUT1/5/9/13 20 42 73 ns Propagation delay time tD5 GSCLK ↑ to OUT2/6/10/14 35 66 106 ns tD6 GSCLK ↑ to OUT3/7/11/15 50 90 140 ns tD7 XLAT ↑ to IOUT (dot correction) 50 ns BLANK ↑ to pre-charge FET on, RL PRE = 10 kΩ, tD8 10 35 130 ns constant current driver off (see Figure 8) tON_ERR Output on-time error(1) GSn = 001h, GSCLK = 33 MHz –20 10 ns (1) Output on-time error is calculated by the following formula: TON_ERR (ns) = tOUTON – TGSCLK. tOUTON is the actual on-time of the constant current driver. TGSCLK is the period of GSCLK. Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Link(s): TLC5944 |
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