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PGA112 Datasheet(PDF) 8 Page - Texas Instruments |
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PGA112 Datasheet(HTML) 8 Page - Texas Instruments |
8 / 47 page PIN CONFIGURATIONS 1 2 3 4 5 10 9 8 7 6 DV DD CS DIO SCLK GND AV DD CH1 V /CH0 CAL V REF V OUT PGA112 PGA113 PGA112 ,, PGA113 PGA116, PGA117 SBOS424B – MARCH 2008 – REVISED SEPTEMBER 2008 ............................................................................................................................................ www.ti.com MSOP-10 DGS PACKAGE (TOP VIEW) PGA112, PGA113 TERMINAL FUNCTIONS MSOP PACKAGE PIN # NAME DESCRIPTION 1 AVDD Analog supply voltage (+2.2V to +5.5V) 2 CH1 Input MUX channel 1 Input MUX channel 0 and VCAL input. For system calibration purposes, connect this pin to a low-impedance external reference voltage to use internal calibration channels. The four internal 3 VCAL/CH0 calibration channels are connected to GND, 0.9VCAL, 0.1VCAL, and VREF, respectively. VCAL is loaded with 100k Ω (typical) when internal calibration channels CAL2 or CAL3 are selected. Otherwise, VCAL/CH0 appears as high impedance. Reference input pin. Connect external reference for VOUT offset shift or to midsupply for midsupply 4 VREF referenced systems. VREF must be connected to a low-impedance reference capable of sourcing and sinking at least 2mA or VREF must be connected to GND. 5 VOUT Analog voltage output. When AVDD < DVDD, VOUT is clamped to AVDD + 300mV. 6 GND Ground pin 7 SCLK Clock input for SPI serial interface 8 DIO Data input/output for SPI serial interface. DIO contains a weak, 10 µA internal pull-down current source. 9 CS Chip select line for SPI serial interface Digital and op amp output stage supply voltage (+2.2V to +5.5V). Useful in multi-supply systems to prevent overvoltage/lockup condition on an analog-to-digital (ADC) input (for example, a microcontroller 10 DVDD with an ADC running on +3V and the PGA powered from +5V). Digital I/O levels to be relative to DVDD. DVDD should be bypassed with a 0.1µF ceramic capacitor, and DVDD must supply the current for the digital portion of the PGA as well as the load current for the op amp output stage. 8 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): PGA112 PGA113 PGA116 PGA117 |
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