Document Number: 72342

S-82626-Rev. C, 03-Nov-08

www.vishay.com

7

Vishay Siliconix

DG2018, DG2019

TEST CIRCUITS

Figure 1. Switching Time

Switch

Input

V+

IN

NO or NC

35 pF

COM

Logic

Input

300

Ω

GND

V+

50 %

0 V

Logic

Input

Switch

Output

Logic "1" = Switch On

Logic input waveforms inverted for switches that have

the opposite logic sense.

0 V

Switch Output

V

R

L

R

Figure 2. Charge Injection

Off

On

On

IN

Q =

COM

IN

GND

V+

V+

IN depends on switch configuration: input polarity

determined by sense of switch.

+

NC or NO

Figure 3. Break-Before-Make Interval

NC

NO

0 V

Logic

Input

Switch

Output

90 %

IN

COM

V+

GND

35 pF

50

Ω