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HD64F38424 Datasheet(PDF) 7 Page - Renesas Technology Corp |
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HD64F38424 Datasheet(HTML) 7 Page - Renesas Technology Corp |
7 / 663 page Rev. 6.00 Aug 04, 2006 page vii of xxxiv Main Revisions for this Edition Item Page Revision (See Manual for Details) All “Under development” indication deleted from H8/38427 Group Preface iv Note 6. (User Board Changes) amended, and note 7. added 6. It is necessary to change the user board for LCD display debugging. This item does not apply if LCD display is not used or if the emulator is not operated in writer mode. User Board Changes The following changes are necessary. • Connect pin V1 to the VCC power supply. Also connect capacitors and resistors to pins V1, V2, and V3. Connect a capacitor and a resistor to pins V1, V2, and V3. Normal Operation Debugging Vcc LCD H8/38327 H8/38427 Vcc LCD H8/38327 H8/38427 P8 7/SEG32 P8 6/SEG31 P8 5/SEG30 P8 7/SEG32 P8 6/SEG31 P8 5/SEG30 V2 V3 R = 240 Ω* C = 0.1 µF* R R R C C C V0 Vcc V1 V0 Vcc V2 V3 Connect Connect Dis- connect Disonnect Disconnect Connect Emulator connectors Emulator connectors Note: * R and C values are intended only as guidelines. They may be adjusted based on the indications. 7. During a break, the watchdog timer continues to operate. Therefore, an internal reset is generated if an overflow occurs during the break. 1.3.2 Pin Functions Table 1.6 Pin Functions 28 Table amended Pin No. Type Symbol FP-80A TFP-80C FP-80B I/O Name and Functions System control TEST 8 10 Input Test pin: This pin is reserved and cannot be used. It should be connected to VSS. 8.3.1 Overview 203 Description amended Port 3 is a 8-bit I/O port, configured as shown in figure 8.2. In the F-ZTAT version, the on-chip pull-up MOS for pin P32 is on during the reset period. It turns off and normal operation resumes after the reset is cleared. This should be considered when making connections to external circuitry. Note that in the mask ROM and ZTAT versions P32 continues to operate normally. |
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