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H8SX1582 Datasheet(PDF) 73 Page - Renesas Technology Corp |
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H8SX1582 Datasheet(HTML) 73 Page - Renesas Technology Corp |
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73 / 796 page  Section 2 CPU Rev. 2.00 Mar. 15, 2006 Page 35 of 754 REJ09B0199-0200 Function Instructions Size Types Branch BRA/BS, BRA/BC, BSR/BS, BSR/BC B* 3 9 Bcc* 5, JMP, BSR, JSR, RTS RTS/L L* 5 BRA/S System control TRAPA, RTE, SLEEP, NOP 10 RTE/L L* 5 LDC, STC, ANDC, ORC, XORC B/W/L Total 87 [Legend] B: Byte size W: Word size L: Longword size Notes: 1. POP.W Rn and PUSH.W Rn are identical to MOV.W @SP +, Rn and MOV.W Rn, @ −SP. POP.L ERn and PUSH.L ERn are identical to MOV.L @SP +, ERn and MOV.L ERn, @ −SP. 2. Size of data to be added with a displacement 3. Size of data to specify a branch condition 4. Bcc is the generic designation of a conditional branch instruction. 5. Size of general register to be restored 6. Not available in this LSI. |
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