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STV7610A Datasheet(PDF) 10 Page - STMicroelectronics |
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STV7610A Datasheet(HTML) 10 Page - STMicroelectronics |
10 / 17 page STV7610A 10/17 CIRCUIT DESCRIPTION The STV7610A contains all the logic and the pow- er circuits necessary to drive the columns of a Plasma Display Panel (P. D. P.). The binary value of each pixel of the displayed line is loaded into the shift register. Data are input in a 6-bit wide data bus to A1 - A6 input (case of forward shift mode). Data are shifted at each low to high transition of the CLK shift clock. After 16 shifts the first data are available on B1 - B6 outputs. These B1 - B6 out- puts can be used to cascade several drivers to perform any horizontal resolution. The forward/ (FOR/ ) input is used to select the direction of the shift register, A1 - A6 and B1 - B6 data bus input/output status is set according to the selected direction. FOR/ = H, A is an input and B is an output. Serial inputs, CLK, STB inputs are Smith trigger in- puts. If not used in the application, Blanking ( ), Polarity ( are internaly pulled to level ”H”. The maximum frequency of the shift clock is 20 MHz. This leads to an equivalent 120 MHz se- rial shift register. On low level of STB, data is transferred from shift register to the latch stage. Data will not be re- freshed as long as STB is kept high. Blanking input ( ) forces the power outputs to low level when pulled low. All the power outputs are set at high level when the Polarity command ( ) is pulled low and the Blanking ( ) input is at high level. VSSSUB and VSSLOG must be connected as close as possible to the logical reference ground of the application. Shift Register Truth Table Power Output Truth Table Note 1 Qn+1 = A1, Qn + 2 = A2, Qn + 3 = A3, Qn + 4 = A4, Qn + 5 = A5, Qn + 6 = A6, n = [0,6,12,18,...,9 0] reverse REV REV BLK POL BLK POL BLK Input Input/Outp ut Shift Register Function FOR/ CLK A B Output Q H Rise IN OUT Forward shift H H or L IN OUT Steady L Rise OUT IN Reverse shift L H or L OUT IN Steady Qn STB Driver Outp ut Comments X X L X L Output low X X H L H Output high X H H H Qn Data latched L L H H L Data copied H L H H H Data copied REV BL K PO L 3 |
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