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M38062M8A-XXXFP Datasheet(PDF) 5 Page - Renesas Technology Corp |
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M38062M8A-XXXFP Datasheet(HTML) 5 Page - Renesas Technology Corp |
5 / 59 page Rev.1.20 Dec 24, 2003 page 5 of 57 3822 Group (A ver.) Table 2 Pin description (2) Function Pin Name Function except a port function P40 P42/INT0, P43/INT1 P44/RXD, P45/TXD, P46/SCLK, P47/SRDY P50/INT2, P51/INT3 P52/RTP0, P53/RTP1 P54/CNTR0, P55/CNTR1 P56/TOUT P57/ADT P60/AN0– P67/AN7 P70/XCOUT, P71/XCIN I/O port P4 I/O port P5 I/O port P6 I/O port P7 •1-bit Input port. •CMOS compatible input level. •7-bit I/O port. •CMOS compatible input level. •CMOS 3-state output structure. •I/O direction register allows each pin to be individually programmed as either input or output. •Pull-up control is enabled. •8-bit I/O port. •CMOS compatible input level. •CMOS 3-state output structure. •I/O direction register allows each pin to be individually programmed as either input or output. •Pull-up control is enabled. •8-bit I/O port. •CMOS compatible input level. •CMOS 3-state output structure. •I/O direction register allows each pin to be individually programmed as either input or output. •Pull-up control is enabled. •2-bit I/O port. •CMOS compatible input level. •CMOS 3-state output structure. •I/O direction register allows each pin to be individually programmed as either input or output. •Pull-up control is enabled. • φ clock output pin •Interrupt input pins •Interrupt input pins •Real time port function pins •Timer X, Y function pins •Timer 2 output pins •A-D conversion input pins •Sub-clock generating circuit I/O pins. (Connect a resonator. External clock cannot be used.) Input port P4 P41/ φ •Serial I/O function pins •A-D trigger input pins |
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