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4509 Datasheet(PDF) 10 Page - Renesas Technology Corp |
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4509 Datasheet(HTML) 10 Page - Renesas Technology Corp |
10 / 142 page Rev.1.02 2006.12.22 page 10 of 140 REJ03B0147-0102 4509 Group Port block diagram (3) (Note 2) P03 (Note 1) (Note 1) PU03 K03 Level detection circuit Key-on wakeup input D TQ FR03 OP0A instruction Register A A3 IAP0 instruction A3 (Note 2) P10 (Note 1) (Note 1) PU10 K10 Edge detection circuit Key-on wakeup input D TQ FR10 OP1A instruction Register A A0 IAP1 instruction A0 L13 0 1 Level detection circuit L12 0 1 (Note 2) P11/CNTR1 (Note 1) (Note 1) PU11 K11 Key-on wakeup input D TQ FR11 OP1A instruction Register A A1 IAP1 instruction A1 L13 0 1 L12 0 1 Clock (input) for timer 1 event count W10 W11 W63 0 1 PWMOD2 W60 0 1 Edge detection circuit Level detection circuit This symbol represents a parasitic diode on the port. 2: Applied potential to these ports must be VDD or less. Notes 1: |
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