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M38B71M1 Datasheet(PDF) 28 Page - Renesas Technology Corp

Part No. M38B71M1
Description  SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
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Maker  RENESAS [Renesas Technology Corp]
Homepage  http://www.renesas.com
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M38B71M1 Datasheet(HTML) 28 Page - Renesas Technology Corp

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38B7 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
27
Fig. 20 Structure of timer X related registers
Fig. 19 Block diagram of timer X
CNTR2 active
edge switch bit
CNTR2 active
edge switch bit
Real time port
control bit
Real time port
control bit
S
“0”
“1”
“0”
“1”
“10”
“00”,“01”,“11”
Q
Q
T
P83/CNTR0/CNTR2
CNTR0
“1”
“0”
“1”
“0”
“1”
“0”
Q D
Q D
P94
P95
“1”
“0”
XIN
XCIN
“1”
“0”
1/2
1/2
1/8
1/64
P83 latch
Timer X (low-order) (8)
Timer X (high-order) (8)
Timer X latch (high-order) (8)
Timer X latch (low-order) (8)
Data bus
Pulse output mode
P83 direction
register
Pulse width
measurement mode
Timer X operating
mode bits
Timer X stop
control bit
Pulse output mode
Count source selection bit
Internal system clock
selection bit
Timer X write
control bit
Timer X
interrupt request
Timer X mode register
write signal
P95 latch
P95 direction
register
P94 latch
P94 direction
register
Latch
Latch
P94 data for real time port
Real time port
control bit (P94)
P95 data for real time port
Real time port
control bit (P95)
Timer X mode register
write signal
b7 b6 b5
b4 b3
b2 b1 b0
Real time port control bit (P94)
0 : Real time port function is invalid
1 : Real time port function is valid
Real time port control bit (P95)
0 : Real time port function is invalid
1 : Real time port function is valid
P94 data for real time port
P95 data for real time port
Not used (returns “0” when read)
Timer X mode register 1
(TXM1 : address 002E16)
Timer X write control bit
0 : Write data to both timer latch and timer
1 : Write data to timer latch only
Timer X count source selection bits
b2 b1
00 : f(XIN)/2 or f(XCIN)/4
01 : f(XIN)/8 or f(XCIN)/16
10 : f(XIN)/64 or f(XCIN)/128
11 : Not available
Not used (returns “0” when read)
Timer X operating mode bits
b5 b4
00 : Timer mode
01 : Pulse output mode
10 : Event counter mode
11 : Pulse width measurement mode
CNTR2 active edge switch bit
0 : • Event counter mode ; counts rising edges
• Pulse output mode ; output starts with “H” level
• Pulse width measurement mode ; measures “H” periods
1 : • Event counter mode ; counts falling edges
• Pulse output mode ; output starts with “L” level
• Pulse width measurement mode ; measures “L” periods
Timer X stop control bit
0 : Count operating
1 : Count stop
Timer X mode register 2
(TXM2 : address 002F16)
b7 b6 b5
b4 b3
b2 b1 b0


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