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M38B71M1 Datasheet(PDF) 93 Page - Renesas Technology Corp

Part No. M38B71M1
Description  SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
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Maker  RENESAS [Renesas Technology Corp]
Homepage  http://www.renesas.com
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M38B71M1 Datasheet(HTML) 93 Page - Renesas Technology Corp

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38B7 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
q Error check command
Input command code 8016 in the first transfer, and the M38B79FF
outputs error information from the SDA pin, beginning at the next
falling edge of the serial clock. If the LSB bit of the 8-bit error infor-
mation is 1, it indicates that a command error has occurred. A
command error means that some invalid commands other than
commands shown in Table 20 has been input.
When a command error occurs, the serial communication circuit
sets the corresponding flag and stops functioning to avoid an erro-
neous programming or erase. When being placed in this state, the
serial communication circuit does not accept the subsequent serial
clock and data (even including an error check command). There-
fore, if the user wants to execute an error check command,
temporarily drop the VPP pin input to the VPPL level to terminate
the serial input/output mode. Then, place the M38B79FF into the
serial I/O mode back again. The serial communication circuit is re-
set by this operation and is ready to accept commands. The error
flag alone is not cleared by this operation, so the user can exam-
ine the serial communication circuit’s error conditions before reset.
This examination is done by the first execution of an error check
command after the reset. The error flag is cleared when the user
has executed the error check command. Because the error flag is
undefined immediately after power-on, always be sure to execute
the error check command.
Fig. 97 Timings at error checking
SCLK
BUSY
OE
SDA
E0
tCH
Command code input (8016)
Error flag output
00000001
??????
Note: When outputting the error flag, the SDA pin is switched for output at the first falling edge of the serial clock. The SDA pin is placed
in the floating state during the period of th(C-E) after the last rising edge of the serial clock (at the 8th bit).
?
“H”
“L”


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