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M38B71M1 Datasheet(PDF) 39 Page - Renesas Technology Corp

Part No. M38B71M1
Description  SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
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Maker  RENESAS [Renesas Technology Corp]
Homepage  http://www.renesas.com
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M38B71M1 Datasheet(HTML) 39 Page - Renesas Technology Corp

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38B7 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
38
(2) Asynchronous serial I/O (UART) mode
The asynchronous serial I/O (UART) mode can be selected by
clearing the serial I/O2 mode selection bit (b6) of the serial I/O2
control register (address 001D16) to “0”. Eight serial data transfer
formats can be selected and the transfer formats used by the
transmitter and receiver must be identical.
The transmit and receive shift registers each have a buffer (the
two buffers have the same address in memory). Since the shift
register cannot be written to or read from directly, transmit data is
written to the transmit buffer, and receive data is read from the re-
ceive buffer. The transmit buffer can also hold the next data to be
transmitted, and the receive buffer can receive 2-byte data con-
tinuously.
Fig. 39 Operation of UART serial I/O2 function
Fig. 38 Block diagram of UART serial I/O2
OE
PE FE
1/16
1/16
Transmit buffer register
Clock control circuit
P66/SCLK21
P64/RXD
P65/TXD
P67/SRDY2/SCLK22
“0”
“1”
1/4
“0”
“1”
XIN
1/2
XCIN
“1”
Data bus
Receive buffer register
Address 001F16
Receive shift register
Receive buffer full flag (RBF)
Receive interrupt request (RI)
Baud rate generator
Division ratio 1/(n+1)
Address 003716
ST/SP/PA generator
Data bus
Transmit shift register
Address 001F16
Transmit shift register shift
completion flag (TSC)
Transmit buffer empty flag (TBE)
Transmit interrupt request (TI)
Address 001E16
ST detector
UART control register
Address 003816
Character length selection bit
Address 001D16
BRG count source
selection bit
Transmit interrupt source selection bit
Serial I/O2 synchronous
clock selection bit
Character length selection bit
7 bit
8 bit
Serial I/O2 control register
Serial I/O2 status register
SP detector
Serial I/O2 clock I/O pin
selection bit
Internal system clock selection bit
BRG clock
switch bit
TSC=0
TBE=1
RBF=0
TBE=0
TBE=0
RBF=1
RBF=1
ST
D0
D1
SP
D0
D1
ST
SP
TBE=1
TSC=1*
ST
D0
D1
SP
D0
D1
ST
SP
Transmit or receive clock
* Generated at 2nd bit in 2-stop
bit mode
1 start bit
7 or 8 data bit
1 or 0 parity bit
1 or 2 stop bit
Serial I/O2 input RXD
Write-in signal to
transmit buffer register
Serial I/O2 output TXD
Read-out signal from receive
buffer register


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