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R8A66170SP Datasheet(PDF) 7 Page - Renesas Technology Corp |
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R8A66170SP Datasheet(HTML) 7 Page - Renesas Technology Corp |
7 / 21 page R8A66170DD/SP REJ03F0272-0100 Rev.1.00 Apr.01.2008 Page 7 of 20 (2) Mode1 This mode is selected by setting D4 = 0 and D3 = 1 in command 1. Figure 10 shows the block diagram in this mode (for one channel). This mode outputs the pulse which is determined by value M of PWM register as one shot by trigger signal. The type of this output operation is determined by whether the external trigger signal or the internal trigger signal is used. Operation varies according to the choice of external and internal trigger signals. (a) External trigger selected (D1 = 1 in command 1) This mode outputs, when a trigger pulse is applied to trigger input TRG, one shot of output pulse. Therefore, cycle time T becomes cycle time fIN of the trigger pulse to be applied to trigger input TRG. The output pulse width is determined by the prescaler register value L and PWM register value M. (See Fig.5) Fig.5 (When H width polarity is “H”) M=0 M=1 M=2 M=3 ・ ・ ・ 1 f (XIN) L+1 f (XIN) TRG trigger input "L" L+1 f (XIN) ・M 1 f IN T= 1 f IN T : Cycle time ( μs) f(XIN) :Oscillator frequency (MHz) L :Prescaler set value M : H width set value fIN :Trigger input frequency (MHz) Internal signal PWM output Prescaler output (PWM clock) (at L = 1) Oscillator source |
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