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R8A66120FFA Datasheet(PDF) 1 Page - Renesas Technology Corp |
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1 / 15 page 4M-bit x 2 MULTIPLE FIELD MEMORY R8A66120FFA RJJ03FXXXREJ03F0161-0170 Rev.1.70 May.16.2008 REJ03F0161-0170 Rev.1.70 May.16.2008 page 1 of 14 Description R8A66120FFA is high-speed field memory with two FIFO (First In First Out) memories of 4M-bit, which uses high-performance silicon gate process technology. Features •Total memory Capacity 8Mega-bit •High speed operation cycle time 10.0ns(Min.) fmax = 100MHz output access time 6.0ns(Max.) •Output hold time 1.0ns(Min.) •Supply voltage 3.3 ± 0.3V •Variable length delay bit •Synchronous write/read operation •3 states output •Package PLQP0048KB-A (48P6Q-A) ( 48pins 7x7mm body LQFP ) Application W-CDMA base station, Digital PPC, Digital TV,VTR and so on. 1024K-word 4bit bus I/F DB<3:0> 1024K-w X 4-bit FIFO 4 4 CKB QB<3:0> WEB WRESB RRESB REB DA<3:0> 1024K-w X 4-bit FIFO 4 4 CKA QA<3:0> WEA WRESA RRESA REA The 2 pieces of 1024K-word x 4-bit FIFO can be operated completely independently. 2-system individual input 2-system individual output 1K-word = 1024-words Mode Descriptions Pin Configuration (Top view) Outline: PLQP0048KB-A (48P6Q-A) |
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