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R2J20601NP Datasheet(PDF) 3 Page - Renesas Technology Corp |
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R2J20601NP Datasheet(HTML) 3 Page - Renesas Technology Corp |
3 / 14 page R2J20601NP REJ03G0237-0700 Rev.7.00 Jun 30, 2008 Page 3 of 13 Pin Arrangement PWM VSWH VSWH VSWH VSWH VSWH VSWH VSWH VSWH CGND GL NC Reg5V DISBL# VIN PGND PGND PGND PGND PGND PGND PGND VSWH VIN VIN VIN VIN VIN (Top view) VSWH 1 14 13 12 11 10 9 8 7 6 5 4 3 2 42 29 30 31 32 33 34 35 36 37 38 39 40 41 56 43 44 45 46 47 48 49 50 51 52 53 54 55 15 27 28 26 25 24 23 22 21 20 19 18 17 16 CGND VIN Note: All die-pads (three pads in total) should be soldered to PCB. Pin Description Pin Name Pin No. Description Remarks CGND 1, 6, 51, Tab Control signal ground Should be connected to PGND externally NC 2, 53 No connect VLDRV 3 Low side gate supply voltage For 5 V to 12 V gate drive voltage for Low side gate driver VCIN 4 Control input voltage (+12 V input) Driver Vcc input BOOT 5 Bootstrap voltage pin To be supplied +5 V through internal SBD GH 7 High side gate signal Pin for Monitor VIN 8 to 20, Tab Input voltage VSWH 21, 40 to 50, Tab Phase output/Switch output PGND 22 to 39 Power ground GL 52 Low side gate signal Pin for Monitor Reg5V 54 +5 V logic power supply output DISBL# 55 Signal disable Disabled when DISBL# is “L” PWM 56 PWM drive logic input |
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Similar Description - R2J20601NP_08 |
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