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R1LV1616RSA-7SR Datasheet(PDF) 14 Page - Renesas Technology Corp

Part # R1LV1616RSA-7SR
Description  16Mb Advanced LPSRAM (1M wordx16bit / 2M wordx8bit)
Download  15 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

R1LV1616RSA-7SR Datasheet(HTML) 14 Page - Renesas Technology Corp

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R1LV1616RBA Series
REJ03C0340-0001 Rev.0.01 2007.10.31
page 14 of 14
Data Retention Characteristics
Note 1. Typical parameter of
IccDR indicates the value for the center of distribution at Vcc=3.0V and not 100% tested.
2. BYTE# pin supported only by TSOP and uTSOP types. BYTE#
≥ Vcc-0.2V or BYTE# ≤ 0.2V
3. Also CS2 controls address buffer, WE# buffer ,CS1# buffer ,OE# buffer ,LB# ,UB# buffer and Din buffer .If CS2
controls data retention mode,Vin levels (address, WE# ,OE#,CS1#,LB#,UB#,I/O) can be in the high impedance
state. If CS1# controls data retention mode, CS2 must be CS2
≥ Vcc-0.2V or 0V
CS2 0.2V. The other input
levels (address, WE# ,OE#,CS1#,LB#,UB#,I/O) can be in the high impedance state.
Data Retention timing Waveform (1) (LB#,UB# Controlled)
Data Retention timing Waveform (2) (CS1# Controlled)
Data Retention timing Waveform (3) (CS2 Controlled)
LB#
UB#
Vcc
tCDR
tR
2.4V
2.4V
2.70V
LB# =UB#
≥ Vcc-0.2V
CS2
Vcc
tCDR
tR
0.2V
0.2V
2.70V
0V
≤ CS2 ≤ 0.2V
Vcc
CS1#
tCDR
tR
2.4V
2.4V
2.70V
CS1#
≥ Vcc-0.2V
Parameter
Symbol
MIn.
Typ.*1
Max.
Unit
Test conditions*2,3
Vcc for data retention
VDR
2.0
-
3.6
V
V in
≥ 0V
(1) 0V
≤ CS2 ≤ 0.2V or
(2) CS2
≥ Vcc-0.2V,
CS1#
≥ Vcc-0.2V or
(3) LB# =UB#
≥ Vcc-0.2V,
CS2
≥ Vcc-0.2V,
CS1#
≤ 0.2V
Data retention current
IccDR
-
2
6
µA
~+25ºC Vcc=3.0V,Vin≥0V
(1) 0V
≤ CS2 ≤ 0.2V or
(2) CS2
≥ Vcc-0.2V,
CS1#
≥ Vcc-0.2V or
(3) LB# =UB#
≥Vcc-0.2V,
CS2
≥ Vcc-0.2V,
CS1#
≤ 0.2V
Average value
-
4
12
µA
~+40ºC
-
-
25
µA
~+70ºC
-
-
40
µA
~+85ºC
Chip deselect to data retention time
tCDR
0
-
-
ns
See retention waveform
Operation recovery time
tR
5
-
-
ms


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