PAM3102 datasheet(9/11 Pages) PAM

Part #	PAM3102

Description	Dual 150mA High PSRR Low-Dropout CMOS Regulator

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Manufacturer	PAM [Power Analog Micoelectronics]

Direct Link	http://www.poweranalog.com

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9 / 11 page

Application Information

9

Capacitor Selection and Regulator Stability

Shutdown Input Operation

Input-Output ( Dropout ) Voltage

Current Limit and Short Circuit Protection

Thermal considerations

Similar to any low dropout regulator, the external

capacitors used with the PAM3102 must be

carefully selected for regulator stability and

performance.

Please note that

the distance between C and the input pin of the

PAM3102 should not exceed 0.5 inch. Ceramic

capacitors a re suitable for t he PAM3102.

Capacitors with larger values and lower ESR

(equivalent series resistance) provide better

PSRR and line-transient response.

The PAM3102 is designed specifically to work

with low ESR ceramic output capacitors in order

to save space and improve performance. Using

an output ceramic capacitor whose value is

>

The PAM3102 is shutdown by pulling the CE

input low, and turned on by tying the CE input to

VIN or leaving the CE input floating.

A regulator's minimum input-output voltage

differential (or dropout voltage) determines the

lowest usable supply voltage. The PAM3102 has

a typical 180mV dropout voltage. In battery-

powered systems, this will determine the useful

end-of-life battery voltage.

The PAM3102 features a current limit, which

monitors and controls the gate voltage of the

pass transistor. The output current can be limited

to 300mA by regulating the gate voltage. The

PAM3102

also has

a

built-in

short circuit

current limit.

Thermal protection limits power dissipation in the

PA M3102. When the junction temperature

exceeds 150°C, the OTP (Over Temperature

Protection) starts the thermal shutdown and

turns the pass transistor off. The pass transistor

resumes operation after the junction temperature

drops below 120°C.

For

c ontinuous

operation,

the

junction

temperature should be maintained below 125°C.

The power dissipation is defined as:

P = (V -V )*I +Vin*Ignd

The maximum power dissipation depends on the

thermal resistance of IC package, PCB layout,

the rate of surrounding airflow and temperature

difference between junction and ambient. The

maximum power dissipation can be calculated by

the following formula:

Where T

is the maximum allowable junction

temperature 125°C,T

i s t he ambient

temperature and

is the thermal resistance

from the junction to the ambient.

For example, as

is 250°C/W for the SOT-23

package based on the standard JEDEC 51-3 for

a single-layer thermal test board, the maximum

power dissipation at TA =25°C can be calculated

by following formula:

P

=(125°C-25°C)/250=0.4W SOT-23

It is also useful to calculate the junction

temperature of the PAM3102 under a set of

specific conditions. Suppose the input voltage

V =3.3V, the output current I =300mA and the

case temperature T =40°C measured by a

thermalcouple during operation, the our power

dissipation is defined as:

P =(3.3V-2.8V)*150mA+(3.3V-1.8V)

*150mA+3.3V*200 A

300mW

And t he junction temperature T

can b e

calculated as follows:

T= T

T = 40°C+0.3W*250°C/W

=40°C+75°C

=115°C<T

= 125°C

For this application, T is lower than the absolute

maximum operating junction temperature,125°C,

so it is safe to use the PAM3102 in this

configuration.

IN

DIN

J(MAX)

A

JA

D(MAX)

IN

O

A

D

J

JA

A

J

J(MAX)

J

2.2μF with ESR>5mΩ ensures stability.

P

= (T

-T )/θ

θ

μ

+P *θ

D(MAX)

J(MAX)

A

JA

DJ

≌

A capacitor C

of more than 1μF can be

employed in the input pin, while there is no upper

limit for the capacitance of C .

IN

OO

PAM3102

Dual 150mA High PSRR Low-Dropout CMOS Regulator

09/2008 Rev 1.1

,

Power Analog Microelectronics Inc

www.poweranalog.com

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