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M24C04RDW3TP Datasheet(PDF) 14 Page - STMicroelectronics

Part # M24C04RDW3TP
Description  16 Kbit, 8 Kbit, 4 Kbit, 2 Kbit and 1 Kbit serial I짼C bus EEPROM
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M24C04RDW3TP Datasheet(HTML) 14 Page - STMicroelectronics

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Device operation
M24C16, M24C08, M24C04, M24C02, M24C01
14/34
3.6.2
Page Write
The Page Write mode allows up to 16 bytes to be written in a single Write cycle, provided
that they are all located in the same page in the memory: that is, the most significant
memory address bits are the same. If more bytes are sent than will fit up to the end of the
page, a condition known as ‘roll-over’ occurs. This should be avoided, as data starts to
become overwritten in an implementation dependent way.
The bus master sends from 1 to 16 bytes of data, each of which is acknowledged by the
device if Write Control (WC) is Low. If the addressed location is Write-protected, by Write
Control (WC) being driven High (during the period from the Start condition until the end of
the address byte), the device replies to the data bytes with NoAck, as shown in Figure 6,
and the locations are not modified. After each byte is transferred, the internal byte address
counter (the 4 least significant address bits only) is incremented. The transfer is terminated
by the bus master generating a Stop condition.
Figure 7.
Write mode sequences with WC = 0 (data write enabled)
BYTE WRITE
DEV SEL
BYTE ADDR
DATA IN
WC
PAGE WRITE
DEV SEL
BYTE ADDR
DATA IN 1
DATA IN 2
WC
DATA IN 3
AI02804B
PAGE WRITE
(cont'd)
WC (cont'd)
DATA IN N
ACK
R/W
ACK
ACK
ACK
ACK
ACK
ACK
R/W
ACK
ACK


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