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MC9S08QD4MPS Datasheet(PDF) 10 Page - Freescale Semiconductor, Inc |
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MC9S08QD4MPS Datasheet(HTML) 10 Page - Freescale Semiconductor, Inc |
10 / 202 page MC9S08QD4 Series MCU Data Sheet, Rev. 3 10 Freescale Semiconductor 4.5.2 Program and Erase Times .................................................................................................39 4.5.3 Program and Erase Command Execution .........................................................................40 4.5.4 Burst Program Execution ..................................................................................................41 4.5.5 Access Errors ....................................................................................................................43 4.5.6 Flash Block Protection ......................................................................................................44 4.5.7 Vector Redirection ............................................................................................................45 4.6 Security ............................................................................................................................................45 4.7 Flash Registers and Control Bits .....................................................................................................46 4.7.1 Flash Clock Divider Register (FCDIV) ............................................................................46 4.7.2 Flash Options Register (FOPT and NVOPT) ....................................................................48 4.7.3 Flash Configuration Register (FCNFG) ...........................................................................49 4.7.4 Flash Protection Register (FPROT and NVPROT) ..........................................................49 4.7.5 Flash Status Register (FSTAT) ..........................................................................................50 4.7.6 Flash Command Register (FCMD) ...................................................................................51 Chapter 5 Resets, Interrupts, and General System Control 5.1 Introduction .....................................................................................................................................53 5.2 Features ...........................................................................................................................................53 5.3 MCU Reset ......................................................................................................................................53 5.4 Computer Operating Properly (COP) Watchdog .............................................................................54 5.5 Interrupts .........................................................................................................................................55 5.5.1 Interrupt Stack Frame .......................................................................................................56 5.5.2 External Interrupt Request (IRQ) Pin ...............................................................................56 5.5.3 Interrupt Vectors, Sources, and Local Masks ...................................................................57 5.6 Low-Voltage Detect (LVD) System ................................................................................................58 5.6.1 Power-On Reset Operation ...............................................................................................59 5.6.2 LVD Reset Operation ........................................................................................................59 5.6.3 LVD Interrupt Operation ...................................................................................................59 5.6.4 Low-Voltage Warning (LVW) ...........................................................................................59 5.7 Real-Time Interrupt (RTI) ...............................................................................................................59 5.8 Reset, Interrupt, and System Control Registers and Control Bits ...................................................60 5.8.1 Interrupt Pin Request Status and Control Register (IRQSC) ............................................60 5.8.2 System Reset Status Register (SRS) .................................................................................61 5.8.3 System Background Debug Force Reset Register (SBDFR) ............................................62 5.8.4 System Options Register 1 (SOPT1) ................................................................................63 5.8.5 System Options Register 2 (SOPT2) ................................................................................64 5.8.6 System Device Identification Register (SDIDH, SDIDL) ................................................64 5.8.7 System Real-Time Interrupt Status and Control Register (SRTISC) ................................65 5.8.8 System Power Management Status and Control 1 Register (SPMSC1) ...........................66 5.8.9 System Power Management Status and Control 2 Register (SPMSC2) ...........................67 Chapter 6 Parallel Input/Output Control 6.1 Port Data and Data Direction ..........................................................................................................69 |
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