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SG5841SY Datasheet(PDF) 7 Page - Fairchild Semiconductor |
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SG5841SY Datasheet(HTML) 7 Page - Fairchild Semiconductor |
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7 / 15 page  © 2006 Fairchild Semiconductor Corporation www.fairchildsemi.com SG5841J • Rev. 1.3.3 7 Electrical Characteristics (Continued) VDD = 15V, TA = 25°C, unless otherwise noted. Symbol Parameter Conditions Min. Typ. Max. Unit Current-Sense Section ZSENSE Input Impedance 12 KΩ VSTHFL Current Limit Flatten Threshold Voltage 0.85 0.90 0.95 V VSTHVA Current Limit Valley Threshold Voltage VSTHFL–VSTHVA 0.22 V tPD Propagation Delay to GATE Output RI=26KΩ 150 200 ns tLEB Leading-Edge Blanking Time RI=26KΩ 200 270 350 ns GATE Section DCYMAX Maximum Duty Cycle 60 65 70 % VGATE-L Output Voltage Low VDD=15V, IO=50mA 1.5 V VGATE-H Output Voltage High VDD=12.5V, IO=50mA 7.5 V tr Rising Time VDD=15V, CL=1nF 150 250 350 ns tf Falling Time VDD=15V, CL=1nF 30 50 90 ns IO Peak Output Current VDD=15V, GATE=6V 230 mA VGATE- CLAMP Gate Output Clamping Voltage VDD=24.7V 18 19 V RT Section IRT Output Current of RT Pin RI=26KΩ 92 100 108 µA VRTTH Trigger Voltage for Over- Temperature Protection 0.585 0.620 0.655 V VRT-RLS OTP Release Voltage VRTTH +0.03 V tD-OTP Over-Temperature Debounce RI=26KΩ 60 100 140 µs |
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