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STPCI2GDY Datasheet(PDF) 27 Page - STMicroelectronics

Part No. STPCI2GDY
Description  X86 Core PC Compatible System-on-Chip for Terminals
Download  111 Pages
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Maker  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
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STPCI2GDY Datasheet(HTML) 27 Page - STMicroelectronics

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PIN DESCRIPTION
Issue 1.0 - July 24, 2002
27/111
Table 2-5. Signal value on Reset
Signal Name
SYSRSTI# active
SYSRSTI# inactive
SYSRSTO# active
release of SYSRSTO#
BASIC CLOCKS AND RESETS
XTALO
14MHz
ISA_CLK
Low
7MHz
ISA_CLK2X
14MHz
OSC14M
14MHz
DEV_CLK
24MHz
HCLK
Oscillating at the speed defined by the strap options.
PCI_CLKO
HCLK divided by 2 or 3, depending on the strap options.
DCLK
17MHz
MEMORY CONTROLLER
MCLKO
66MHz if asynchonous mode, HCLK speed if synchronized mode.
CS#[3:1]
High
CS#[0]
High
SDRAM init sequence:
Write Cycles
MA[10:0], BA[0]
0x00
RAS#[1:0], CAS#[1:0]
High
MWE#, DQM[7:0]
High
MD[63:0]
Input
PCI INTERFACE
AD[31:0]
0x0000
First prefetch cycles
when not in Local Bus mode.
CBE[3:0], PAR
Low
FRAME#, TRDY#, IRDY#
Input
STOP#, DEVSEL#
Input
PERR#, SERR#
Input
PCI_GNT#[2:0]
High
ISA BUS INTERFACE
ISAOE#
High
Low
RMRTCCS#
Hi-Z
First prefetch cycles
when in ISA or PCMCIA mode.
Address start is 0xFFFFF0
LA[23:17]
Unknown
0x00
SA[19:0]
0xFFFXX
0xFFF03
SD[15:0]
Unknown
0xFF
BHE#, MEMR#
Unknown
High
MEMW#, SMEMR#, SMEMW#, IOR#, IOW# Unknown
High
REF#
Unknown
High
ALE, AEN
Low
DACK_ENC[2:0]
Input
0x04
TC
Input
Low
GPIOCS#
Hi-Z
High
RTCDS#, RTCRW#, KBCS#
Hi-Z
RTCAS
Unknown
Low
PCMCIA INTERFACE
RESET
Unknown
High
A[23:0]
Unknown
0x00
First prefetch cycles
using RMRTCCS#
D[15:0]
Unknown
0xFF
IORD#, IOWR#, OE#
Unknown
High
WE#, REG#
High
CE2#, CE1#, VCC5_EN, VCC3_EN
High
VPP_PGM, VPP_VCC
Low
LOCAL BUS INTERFACE
PA[24:0]
Unknown
First prefetch cycles
PD[15:0]
Unknown
0xFF
PRD#
Unknown
High
PBE#[1:0], FCS0#, FCS_0H#
High


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