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FOD3180T Datasheet(PDF) 11 Page - Fairchild Semiconductor |
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FOD3180T Datasheet(HTML) 11 Page - Fairchild Semiconductor |
11 / 13 page ©2005 Fairchild Semiconductor Corporation www.fairchildsemi.com FOD3180 Rev. 1.0.6 11 Reflow Profile Output Power Derating T he maximum package power dissipation is 295mW. The package is limited to this level to ensure that under normal operating conditions and over extended temperature range that the semiconductor junction temperatures do not exceed 125°C. The package power is composed of three elements; the LED, static operating power of the output IC, and the power dissipated in the output power MOSFET transistors. The power rating of the output IC is 250mW. This power is divided between the static power of the integrated circuit, which is the product of IDD times the power supply voltage (VDD – VEE). The maximum IC static output power is 150mW, (VDD – VEE) = 25V, IDD = 6mA. This maximum condition is valid over the opera- tional temperature range of -40°C to +100°C. Under these maximum operating conditions, the output of the power MOSFET is allowed to dissipate 100mW of power. The absolute maximum output power dissipation versus ambient temperature is shown in Figure 12. The output driver is capable of supplying 100mW of output power over the temperature range from -40°C to 87°C. The out- put derates to 90mW at the absolute maximum operating temperature of 100°C. The output power is the product of the average output current squared times the output transistor’s RDS(ON): PO(AVG) = IO(AVG)2 • RDS(ON) The IO(AVG) is the product of the duty factor times the peak current flowing in the output. The duty factor is the ratio of the ‘on’ time of the output load current divided by the period of the operating frequency. An RDS(ON) of 2.0 Ω results in an average output load current of 200mA. The load duty factor is a ratio of the average output time of the power MOSFET load circuit and period of the driv- ing frequency. The maximum permissible, operating frequency is deter- mined by the load supplied to the output at its resulting output pulse width. Figure 13 shows an example of a 0.03µF gate to source capacitance with a series resis- tance of 8.50 Ω. This reactive load results in a composite average pulse width of 1.5µs. Under this load condition it is not necessary to derate the absolute maximum output current until the frequency of operation exceeds 63kHz. • Peak reflow temperature: 260 C (package surface temperature) • Time of temperature higher than 183 C for 160 seconds or less • One time soldering reflow is recommended 245 C, 10–30 s Time (Minute) 0 300 250 200 150 100 50 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 Time above 183C, <160 sec Ramp up = 2–10C/sec 260 C peak Fig. 12 Absolute Maximum Power Dissipation vs. Ambient Temperature TA – AMBIENT TEMPERATURE (°C) -40 -20 0 20 40 60 80 100 0.15 0.1 0.05 0 VDD – VEE = Max. = 25V IDD = 6mA LED Power = 45mW F – FREQUENCY (kHz) 0 0.5 1 1.5 2 2.5 110 100 Fig. 13 Output Current Derating vs. Frequency TA = -40°C to 100°C Load = .03µF +8.5Ω VDD = 20V IF = 12mA LED Duty Factor = 50% Output Pulse Width = 1.5µs |
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