© 2008 Fairchild Semiconductor Corporation

www.fairchildsemi.com

FAN3121 / FAN3122 • Rev. 1.0.0

2

Ordering Information

Part Number

Logic

Input

Threshold

Package

Eco

Status

Packing

Method

Quantity

per Reel

FAN3121CMPX

3x3mm MLP-8

RoHS

Tape & Reel

3,000

FAN3121CMX

CMOS

SOIC-8

RoHS

Tape & Reel

2,500

FAN3121TMPX

3x3mm MLP-8

RoHS

Tape & Reel

3,000

FAN3121TMX

Inverting Channels +

Enable

TTL

SOIC-8

RoHS

Tape & Reel

2,500

FAN3122CMPX

3x3mm MLP-8

RoHS

Tape & Reel

3,000

FAN3122CMX

CMOS

SOIC-8

RoHS

Tape & Reel

2,500

FAN3122TMPX

3x3mm MLP-8

RoHS

Tape & Reel

3,000

FAN3122TMX

Non-Inverting Channels +

Enable

TTL

SOIC-8

RoHS

Tape & Reel

2,500

Package Outlines

Figure 3.

3x3mm MLP-8 (Top View)

Figure 4.

SOIC-8 (Top View)

Thermal Characteristics

(1)

Package

Θ

JL

(2)

Θ

JT

(3)

Θ

JA

(4)

Ψ

JB

(5)

Ψ

JT

(6)

Units

8-Lead 3x3mm Molded Leadless Package (MLP)

1.2

64

42

2.8

0.7

°C/W

8-Pin Small Outline Integrated Circuit (SOIC)

38

29

87

41

2.3

°C/W

Notes:

1.

Estimates derived from thermal simulation; actual values depend on the application.

2.

Theta_JL (

(including any thermal pad) that are typically soldered to a PCB.

3.

Theta_JT (

assuming it is held at a uniform temperature by a top-side heatsink.

4.

and airflow. The value given is for natural convection with no heatsink, as specified in JEDEC standards

JESD51-2, JESD51-5, and JESD51-7, as appropriate.

5.

Psi_JB (

temperature and an application circuit board reference point for the thermal environment defined in Note 4. For

the MLP-8 package, the board reference is defined as the PCB copper connected to the thermal pad and

protruding from either end of the package. For the SOIC-8 package, the board reference is defined as the PCB

copper adjacent to pin 6.

6.

Psi_JT (

temperature and the center of the top of the package for the thermal environment defined in Note 4.