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TRF3762-EIRHAT Datasheet(PDF) 7 Page - Texas Instruments

Part # TRF3762-EIRHAT
Description  INTEGER-N PLL WITH INTEGRATED VCO
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TRF3762-EIRHAT Datasheet(HTML) 7 Page - Texas Instruments

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TRF3762-E ELECTRICAL CHARACTERISTICS
TRF3762
www.ti.com ....................................................................................................................................................... SLWS205A – JANUARY 2008 – REVISED MAY 2008
Supply voltage = VCC = 5V, TA = –40 to 85 °C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
NOISE CHARACTERISTICS
100kHz offset
-119.3
600kHz offset
-137.3
VCO phase noise,
fVCO = 1869MHz,
1MHz offset
-141.4
dBc/Hz
Free running VCO direct output
fO = 1869MHz
6MHz offset
-154.1
10MHz offset
-156
100kHz offset
-124.4
600kHz offset
-143
VCO phase noise,
fVCO = 1869MHz,
1MHz offset
-146.7
dBc/Hz
Free running VCO divide-by-2 output
fO = 934.5MHz
6MHz offset
-156.5
10MHz offset
-156.7
100kHz offset
-131
600kHz offset
-149
VCO phase noise,
fVCO = 1869MHz,
1MHz offset
-151
dBc/Hz
Free running VCO divide-by-4 output
fO = 467.25MHz
6MHz offset
-155.8
10MHz offset
-156.1
1kHz offset
-82.5
600kHz offset
-136.7
VCO phase noise,
fVCO = 1869MHz,
dBc/Hz
Closed loop phase noise direct output(1)(2)(3)
fO = 1869MHz
1MHz offset
-141.6
10MHz offset
-156
RMS phase error
100Hz to 10MHz
1.02
°
Closed loop phase noise direct output(3)
1kHz offset
-87.8
600kHz offset
-142.6
VCO phase noise,
fVCO = 1869MHz,
dBc/Hz
Closed loop phase noise divide-by-2 output(1)(2)(3)
fO = 934.5MHz
1MHz offset
-147
10MHz offset
-1567.6
RMS phase error
100Hz to 10MHz
0.521
°
Closed loop phase noise divide-by-2 output(3)
1kHz offset
-92.9
600kHz offset
-148.1
VCO phase noise,
fVCO = 1869MHz,
dBc/Hz
Closed loop phase noise divide-by-4 output(1)(2)(3)
fO = 467.25MHz
1MHz offset
-151.4
10MHz offset
-155.2
RMS phase error
100Hz to 10MHz
0.251
°
Closed loop phase noise divide-by-4 output(3)
VCO gain, Kv
VCO free running
24
MHz/V
Reference spur and multiples (2)
-80
dBc
(1)
See Application Circuit Figure 15.
(2)
PFD = 200kHz, Loop Filter BW = 15kHz, Output frequency step = 200kHz.
(3)
Reference oscillator RMS phase error = 0.008250
°, RMS jitter = 881.764 fs.
Copyright © 2008, Texas Instruments Incorporated
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