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TAS3218IPZP Datasheet(PDF) 3 Page - Texas Instruments |
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TAS3218IPZP Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 78 page  TAS3218 www.ti.com ....................................................................................................................................................................................................... SLES235 – JULY 2008 TERMINAL FUNCTIONS TERMINAL I/O TERMINATION(1) DESCRIPTION NO. NAME 1 DVSS1 P Digital ground 2 VREG_EN DI Voltage regulator enable 3 STEST DI Pulldown Test pin to reconfigure pins 4, 5, 17, 18, TEST Pulldown 19, 20 6 GPIO4 DIO Pulldown General purpose input/output 4 7 GPIO3 DIO Pulldown General purpose input/output 3 8 MCLKOUT DO Master clock output 9 LRCLKOUT DO Left/right (frame) clock output 10 SCLKOUT DO Serial audio data clock output 11 SDOUT1 DO Serial digital audio data output 1 SDOUT2/ 12 DO Serial digital audio data out 2 or S/PDIF out SPDIF_OUT 13 DVDD2 P 3.3-V digital power Pin out of internal regulator. A 4.7-F low ESR capacitor should be 14 VR_DIG1 P connected between this pin and digital ground. This terminal must not be used to power external devices. 15 DVSS2 P Digital ground 16 SPDIF_IN DI S/PDIF input 21 SDIN3 DI Serial digital audio data input 3 22 SDIN2 DI Serial digital audio data input 2 23 SDIN1 DI Serial digital audio data input 1 24 LRCLKIN DI Left/right (frame) clock input 25 SCLKIN DI Serial audio data clock input 26 MCLKIN DI Master clock input 27 DVSS3 P Digital ground 28 DVDD3 P 3.3-V digital power master 29 I2C_SDA2 DIO I2C serial data master 30 I2C_SCL2 DIO I2C serial clock slave 31 I2C_SDA1 DIO I2C serial data slave 32 I2C_SCL1 DIO I2C serial clock 33 CS DI Chip select 34 GPIO1 DIO General purpose input/output 1 35 GPIO2 DIO General purpose input/output 2 36 MUTE DI Pullup Mute device 37 RESET DI Pullup Reset 38 DVSS4 P Digital ground 39 DVDD4 P 3.3-V digital power 40 DVSS5 P 3.3-V digital power Pin out of internal regulator. A 4.7-F low ESR capacitor should be 41 VR_DIG2 P connected between this pin and digital ground. This terminal must not be used to power external devices. 42 AVSS_ESD P Analog ESD ground 43 LINEIN1L AI Left-channel analog input 1 (1) All pullups are 20-A weak pullups, and all pulldowns are 20-A weak pulldowns (166 k) . The pullups and pulldowns are included to ensure proper input logic levels if the terminals are left unconnected (pullups at logic 1 input; pull-downs at logic 0 input). Devices that drive inputs with pullups must be able to sink 20 A while maintaining a logic 0 drive level. Devices that drive inputs with pull-downs must be able to source 20 A while maintaining a logic 1 drive level. Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Link(s): TAS3218 |
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