www.latticesemi.com

2-1

DS1032_02.1

August 2004

Data Sheet DS1032

© 2004 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand

or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.

Features

■ Monitor and Control Multiple Power

Supplies

• Simultaneously monitors and sequences up to six

power supplies

• Sequence controller for power-up conditions

• Provides four output control signals

• Programmable digital and analog circuitry

■ Embedded PLD for Sequence Control

• Implements state machine and input conditional

events

• In-System Programmable (ISP™) through JTAG

and on-chip E

■ Embedded Programmable Timers

• Two Programmable 8-bit timers (32µs to 524ms)

• Programmable time delay for pulse stretching or

other power supply management

■ Analog Comparators for Monitoring

• Six analog comparators for monitoring

• 192 precise programmable threshold levels

spanning 1.03V to 5.72V

• Each comparator can be independently config-

ured around standard logic supply voltages of

1.2V, 1.5V, 1.8V, 2.5V, 3.3V, 5V

• Other user-defined voltages possible

• Six direct comparator outputs

■ Embedded Oscillator

• Built-in clock generator, 250kHz

• Programmable clock frequency

• Programmable timer pre-scaler

• External clock support

■ Programmable Open-Drain Outputs

• Four digital outputs for logic and power supply

control

• Expandable with ispMACH™ 4000 CPLD

■ 2.25V to 5.5V Supply Range

• In-system programmable at 3.0V to 5.5V

• Industrial temperature range: -40°C to +85°C

• Automotive temperature range: -40°C to +125°C

• 44-pin TQFP package

• Lead-free package option

Application Block Diagram

Description

The Lattice ispPAC

system programmable logic and in-system programma-

ble analog circuits to perform special functions for

power supply sequencing and monitoring. The ispPAC-

POWR604 device has the capability to be configured

through software to control up to four outputs for power

supply sequencing and six comparators monitoring sup-

ply voltage limits, along with four digital inputs for inter-

facing to other control circuits or digital logic. Once

configured, the design is downloaded into the device

through a standard JTAG interface. The circuit configu-

ration and routing are stored in non-volatile E

PAC-Designer,

®

an easy-to-use Windows-compatible

software package, gives users the ability to design the

logic and sequences that control the power supplies or

regulator circuits. The user has control over timing func-

tions, programmable logic functions and comparator

threshold values as well as I/O configurations.

ispPAC-POWR604

Power Sequence

Controller

OUT5

OUT6

OUT7

OUT8

RESET

Comp2

Comp4

6 Analog Inputs

IN1

IN2

IN3

IN4

VMON1

VMON2

VMON3

VMON4

VMON5

VMON6

CLK

Comp3

Comp1

Comp6

Comp5

Digital

Logic

CPU/ASIC

Card etc.

POR

CREF

0.1uF

VDD VDDINP

2.5-5V Supply

0.1uF

1.0uF

Voltage Monitor 6

Voltage Monitor 5

CPU_RESETN

BROWNOUT_INT

POWER_OK

LOAD_ENABLE

CARD_RESETN

DONE

WDT_IN

INT_ACK

ispPAC-POWR604

In-System Programmable Power Supply

Sequencing Controller and Monitor

®