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ISPLSI1032E80LTN Datasheet(PDF) 8 Page - Lattice Semiconductor |
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ISPLSI1032E80LTN Datasheet(HTML) 8 Page - Lattice Semiconductor |
8 / 17 page 8 Specifications ispLSI 1032E Internal Timing Parameters1 GRP Delay, 32 GLB Loads tiobp 1. Internal Timing Parameters are not tested and are for reference only. 2. Refer to Timing Model in this data sheet for further details. 3. The XOR adjacent path can only be used by hard macros. Table 2-0036B/1032E Inputs UNITS -80 MIN. -70 MIN. MAX. MAX. DESCRIPTION # 2 PARAM. 22 I/O Register Bypass – ns tiolat 23 I/O Latch Delay – ns tgrp32 33 –ns GLB t1ptxor 36 1 Prod.Term/XOR Path Delay – ns t20ptxor 37 20 Prod. Term/XOR Path Delay – ns txoradj 38 XOR Adjacent Path Delay – ns tgbp 39 GLB Register Bypass Delay –ns tgsu 40 GLB Register Setup Time before Clock ns tgh 41 GLB Register Hold Time after Clock ns tgco 42 GLB Register Clock to Output Delay – ns 3 tgro 43 GLB Register Reset to Output Delay – ns tptre 44 GLB Prod.Term Reset to Register Delay – ns tptoe 45 GLB Prod. Term Output Enable to I/O Cell Delay – ns tptck 46 GLB Prod. Term Clock Delay ns ORP GRP MIN. MAX. t4ptbpc 34 4 Prod.Term Bypass Path Delay (Combinatorial) – ns t4ptbpr 35 4 Prod. Term Bypass Path Delay (Registered) – ns 0.5 7.9 4.5 torp 47 ORP Delay – ns torpbp 48 ORP Bypass Delay – 0.0 ns tiosu 24 I/O Register Setup Time before Clock 3.5 ns tioh 25 I/O Register Hold Time after Clock 0.0 ns tioco 26 I/O Register Clock to Out Delay – ns tior 27 I/O Register Reset to Out Delay – ns tdin 28 Dedicated Input Delay – ns tgrp16 32 GRP Delay, 16 GLB Loads – ns tgrp8 31 GRP Delay, 8 GLB Loads – ns tgrp4 30 GRP Delay, 4 GLB Loads – ns tgrp1 29 GRP Delay, 1 GLB Load – ns 0.3 2.7 4.8 6.6 7.8 8.2 1.3 2.9 6.4 5.5 8.0 7.1 6.7 – – 5.8 1.0 0.0 – – 5.4 5.4 2.8 3.5 2.8 2.5 2.2 – – – – – – – – – – – – – 0.5 8.8 4.8 – – 4.0 0.0 – – – – – – – 0.3 3.3 5.6 8.3 8.7 9.2 1.6 2.9 6.8 5.8 9.0 8.8 7.2 – – 6.2 1.0 – – 6.1 6.0 2.8 4.0 3.2 2.5 2.5 -90 – – – – – – – – – – – – – – 0.2 6.8 4.1 – 3.5 0.0 – – – – – – – 0.3 2.3 4.4 5.6 6.8 7.1 0.4 2.9 6.3 5.1 7.1 5.7 6.1 – – 5.3 1.0 0.0 – – 5.0 5.0 2.6 3.2 2.6 2.3 2.1 |
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