ISPPACCLK5520V-01TN48I datasheet(9/48 Pages) LATTICE

Part #	ISPPACCLK5520V-01TN48I

Description	In-System Programmable Clock Generator with Universal Fan-Out Buffer

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Manufacturer	LATTICE [Lattice Semiconductor]

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Lattice Semiconductor

ispClock5500 Family Data Sheet

9

Programmable Input and Output Termination Characteristics

Symbol

Parameter

Conditions

VCCO Voltage

Min.

Typ.

Max.

Units

RIN

Input Resistance

Rin=40Ω setting

36

—

44

Ω

Rin=45Ω setting

40.5

—

49.5

Rin=50Ω setting

45

—

55

Rin=55Ω setting

49.5

—

60.5

Rin=60Ω setting

54

—

66

Rin=65Ω setting

59

—

71.5

Rin=70Ω setting

61

—

77

ROUT

Output Resistance

1

Rout≈20Ω setting

VCCO=3.3V

—

14

—

Ω

VCCO=2.5V

—

14

—

VCCO=1.8V

—

14

—

VCCO=1.5V

—

14

—

Rout≈40Ω setting

VCCO=3.3V

-9%

38

9%

VCCO=2.5V

-11%

40

11%

VCCO=1.8V

-13%

40

13%

Rout≈45Ω setting

VCCO=3.3V

-10%

45

10%

VCCO=2.5V

-12%

45

12%

VCCO=1.8V

-14%

44

14%

Rout≈50Ω setting

VCCO=3.3V

-8%

50

8%

VCCO=2.5V

-9%

49

9%

VCCO=1.8V

-13%

49

13%

Rout≈55Ω setting

VCCO=3.3V

-9%

55

9%

VCCO=2.5V

-11%

55

11%

VCCO=1.8V

-13%

55

13%

Rout≈60Ω setting

VCCO=3.3V

-8%

59

8%

VCCO=2.5V

-9%

59

9%

VCCO=1.8V

-14%

59

14%

Rout≈65Ω setting

VCCO=3.3V

-8%

65

8%

VCCO=2.5V

-9%

64

9%

VCCO=1.8V

-13%

64

13%

Rout≈70Ω setting

VCCO=3.3V

-9%

72

9%

VCCO=2.5V

-10%

70

10%

VCCO=1.8V

-12%

69

12%

1. Guaranteed by characterization.

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