ISPPACCLK5316S-01T48I datasheet(6/56 Pages) LATTICE

Part #	ISPPACCLK5316S-01T48I

Description	In-System Programmable, Zero-Delay, Universal Fan-Out Buffer, Single-Ended

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Manufacturer	LATTICE [Lattice Semiconductor]

Direct Link	http://www.latticesemi.com

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6 / 56 page

Lattice Semiconductor

ispClock5300S Family Data Sheet

6

E

2CMOS Memory Write/Erase Characteristics

Performance Characteristics – Power Supply

DC Electrical Characteristics – Single-Ended Logic

DC Electrical Characteristics – LVDS

DC Electrical Characteristics – Differential LVPECL

Parameter

Conditions

Min.

Typ.

Max.

Units

Erase/Reprogram Cycles

1000

—

Symbol

Parameter

Conditions

Typ.

Max.

Units

ICCD

Core Supply Current

2

fVCO = 400MHz Feedback Output Active

110

150

mA

ICCDADDER

Incremental ICCD per Active

Output

fOUT = 267MHz

1.5

mA

ICCA

Analog Supply Current

2

fVCO = 400MHz

5.5

7

mA

ICCO

Output Driver Supply Current

(per Bank)

VCCO = 1.8V

1, LVCMOS, fOUT = 267MHz

16

20

mA

VCCO = 2.5V

1, LVCMOS, fOUT = 267MHz

21

27

mA

VCCO = 3.3V

1, LVCMOS, fOUT = 267MHz

27

35

mA

ICCJ

JTAG I/O Supply Current (static)

VCCJ = 1.8V

300

µA

VCCJ = 2.5V

400

µA

VCCJ = 3.3V

400

µA

1. Supply current consumed by each bank, both outputs active, 5pF load.

2.All unused REFCLK and feedbacks connected to ground.

Logic Standard

VIL (V)

VIH (V)

VOL Max. (V) VOH Min. (V)

IOL (mA)

IOH (mA)

Min.

Max.

Min.

Max.

LVTTL/LVCMOS 3.3V

-0.3

0.8

2

3.6

0.4

VCCO - 0.4

12

3

-12

3

LVCMOS 1.8V

-0.3

0.68

1.07

3.6

0.4

VCCO - 0.4

12

3

-12

3

LVCMOS 2.5V

-0.3

0.7

1.7

3.6

0.4

VCCO - 0.4

12

3

-12

3

SSTL2 Class 1

-0.3

VREF - 0.18 VREF + 0.18

3.6

0.54

1

VCCO - 0.81

1

7.6

-7.6

SSTL3 Class 1

-0.3

VREF - 0.2 VREF + 0.2

3.6

0.9

1

VCCO - 1.3

1

8-8

HSTL Class 1

-0.3

VREF - 0.1 VREF + 0.1

3.6

0.4

2

VCCO - 0.4

2

8-8

eHSTL Class 1

-0.3

VREF - 0.1 VREF + 0.1

3.6

0.4

2

VCCO - 0.4

2

8-8

1. Speciﬁed for 40Ω internal series output termination.

2. Speciﬁed for ≈20Ω internal series output termination, fast slew rate setting.

3. For slower slew rate setting, IOH, IOL should be limited to 8mA.

Symbol

Parameter

Conditions

Min.

Typ.

Max.

Units

VICM

Common Mode Input Voltage

VTHD/2

2.325

V

VTHD

Differential Input Threshold

VICM ≤ 2V

±100

—

mV

2V < VICM < 2.325V

±150

—

mV

VIN

Input Voltage

0

—

2.4

V

Symbol

Parameter

Test Conditions

Min.

Typ.

Max.

Units

VIH

Input Voltage High

VCCD = 3.0 to 3.6V

VCCD - 1.17

—

VCCD - 0.88

V

VCCD = 3.3V

2.14

—

2.42

VIL

Input Voltage Low

VCCD = 3.0 to 3.6V

VCCD - 1.81

—

VCCD - 1.48

V

VCCD = 3.3V

1.49

—

1.83

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ISPPACCLK5316S-01T48I Datasheet(PDF) 6 Page - Lattice Semiconductor

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